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DLA - DSCC-VID-V62/14607 - MICROCIRCUIT, DIGITAL, 128-MBIT 3 V, MULTIPLE I/O, 4-KB SUBSECTOR-ERASE ON BOOT SECTORS, XIP ENABLED, SERIAL-FLASH MEMORY WITH 108 MHZ, SPICEBUSH INTERFACE, MONOLITHIC SILICON Organization: DLA
Date: 2014-11-14
Description: This drawing documents the general requirements of a high performance 128-Mbit 3 V, 4 kB subsector-erase on boot sectors, XiP enabled, serial-flash memory with 108 MHz, SPI-bus interface microcircuit, with an operating temperature range of -40°C to +125°C.
JEDEC JESD 223-1 - UNIVERSAL FLASH STORAGE HOST CONTROLLER INTERFACE (UFSHCI), UNIFIED MEMORY EXTENSION VERSION 1.1 Organization: JEDEC
Date: 2016-03-01
Description: This document provides a comprehensive definition of the requirements for implementation of a UFS Host Controller, which supports the optional Unified Memory extension.
SAE J2610 - SERIAL DATA COMMUNICATION INTERFACE Organization: SAE
Date: 2015-01-01
Description:   History Fiat Chrysler Automobiles (FCA) introduced flash technology into emission-related powertrain ECUs beginning in the 1993 model year. Flash technology consisted of implementing reprogrammable memory devices into powertrain ECUs for purposes of updating software functionality and calibrations in the customer field (service environment), assembly plant (manufacturing environment), and vehicle development (engineering environment).
JEDEC JESD 216 - SERIAL FLASH DISCOVERABLE PARAMETERS (SFDP) Organization: JEDEC
Date: 2014-05-01
Description: This header and table provide basic information for a Serial Peripheral Interface (SPI) protocol memory. Additional headers and tables are optional.
JEDEC JESD 220 - UNIVERSAL FLASH STORAGE (UFS) VERSION 2.1 Organization: JEDEC
Date: 2016-03-01
Description: This standard specifies the characteristics of the UFS electrical interface and the memory device. Such characteristics include (among others) low power consumption, high data throughput, low electromagnetic interference and optimization for mass memory subsystem efficiency.
JEDEC JESD 220-2 - UNIVERSAL FLASH STORAGE (UFS) CARD EXTENSION VERSION 1.0 Organization: JEDEC
Date: 2016-03-01
Description: This standard specifies the characteristics of the UFS card electrical interface and the memory device. This document defines the added/modified features in UFS card compared to embedded UFS device.
JEDEC JESD 84-C01 - MULTIMEDIACARD (MMC) CARD MECHANICAL STANDARD Organization: JEDEC
Date: 2007-06-01
Description: This document is a mechanical product specification for a removable non-volatile flash memory device using the MMC interface version 4.2. The electrical specification for the MMC interface version 4.2 is document JESD84-B42.
JEDEC JESD 248 - DDR4 NVDIMM-N DESIGN STANDARD REVISION 1.0 Organization: JEDEC
Date: 2016-09-01
Description: This standard defines the electrical and mechanical requirements for 288-pin, 1.2 Volt (VDD), Double Data Rate, Synchronous SDRAM Non-Volatile Dual In-Line Memory Modules with NAND Flash backup (DDR4 NVDIMM-N). A DDR4 NVDIMM-N is a Hybrid Memory Module with a DDR4 DIMM interface consisting of DRAM that is made non-volatile through the use of NAND Flash.
MCGRAW - PROGRAMMING ARDUINO - PROGRAMMING ARDUINO: GETTING STARTED WITH SKETCHES, SECOND EDITION Organization: MCGRAW
Date: 2016-01-01
Description: • Set up the software, power up your Arduino, and start uploading sketches • Understand the basics of C language programming • Add functions, arrays, and strings to your sketches • Program Arduino's digital and analog inputs and outputs • Use functions from the standard Arduino library • Write sketches that store data in EEPROM or flash memoryInterface with displays, including OLEDs and LCDs • Connect to the Internet and configure Arduino as a Web server • Develop interesting programs for the Internet of Things • Build your own libraries and use object-oriented programming methods Author: Simon Monk
DSF/ISO/IEC FDIS 19678 - INFORMATION TECHNOLOGY -- BIOS PROTECTION GUIDELINES Organization: DS
Description: ., conventional BIOS or UEFI BIOS) stored in the system flash memory of computer systems, including portions that may be formatted as Option ROMs.
DSF/ISO/IEC DIS 19678 - INFORMATION TECHNOLOGY -- BIOS PROTECTIONS Organization: DS
Description: ., conventional BIOS or UEFI BIOS) stored in the system flash memory of computer systems, including portions that may be formatted as Option ROMs.
DS/ISO/IEC 19678 - INFORMATION TECHNOLOGY - BIOS PROTECTION GUIDELINES Organization: DS
Date: 2015-05-06
Description: ., conventional BIOS or UEFI BIOS) stored in the system flash memory of computer systems, including portions that may be formatted as Option ROMs.
ISO/IEC 19678 - INFORMATION TECHNOLOGY - BIOS PROTECTION GUIDELINES - FIRST EDITION Organization: ISO
Date: 2015-05-01
Description: ., conventional BIOS or UEFI BIOS) stored in the system flash memory of computer systems, including portions that may be formatted as Option ROMs.
NEMA TS 2 - TRAFFIC CONTROLLER ASSEMBLIES WITH NTCIP REQUIREMENTS - VERSION 03.07 Organization: NEMA
Date: 2016-01-01
Description: Alternate phase sequences. vii. Start-up flash. viii. Automatic flash. ix. Dimming. x. Coordination: Sixteen timing plans; one cycle length per timing plan; one split per timing plan; three offset per timing plan.

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