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JEDEC JESD 204 - SERIAL INTERFACE FOR DATA CONVERTERS Organization: JEDEC
Date: 2012-01-01
Description: Due to the range of applications involved, the intention of the document is to completely specify only the serial data interface and the link protocol. Certain signals common to both the interface and the function of the device, such as device clocks and control interfaces, have application-dependent requirements.
IEEE 1174 - SERIAL INTERFACE FOR PROGRAMMABLE INSTRUMENTATION Organization: IEEE
Date: 2000-01-30
Description: This standard defines a serial, full-duplex, asynchronous, 9-pin data terminal equipment (DTE) communications port that follows ANSI/TIA/EIA-574-1990 and related standards.
SMPTE ST 292-1 - 1.5 GB/S SIGNAL/DATA SERIAL INTERFACE Organization: SMPTE
Date: 2012-01-03
Description: This standard defines a bit-serial data structure and the coaxial cable interface specifications for 1.5 Gb/s [nominal] Signal/Data Serial Interface to carry either 1280×720, 1920×1080 or 2048×1080 active pixel formats mapped into the 1.5 Gb/s payload.
SMPTE ST 424 - 3 GB/S SIGNAL/DATA SERIAL INTERFACE Organization: SMPTE
Date: 2012-10-08
Description: This standard defines a bit-serial data structure and coaxial cable interface for the transport of signals with a total payload of 2.970 Gb/s or 2.970/1.001 Gb/s.
SMPTE 292 - 1.5 GB/S SIGNAL/DATA SERIAL INTERFACE Organization: SMPTE
Date: 2008-02-07
Description: This standard is a transport defining a bit-serial data structure for 1.5 Gb/s [nominal] component signals, SDTV signals mapped into the SMPTE 292 payload, and formatted packetized data.
SMPTE ST 310 - TELEVISION — SYNCHRONOUS SERIAL INTERFACE FOR MPEG-2 DIGITAL TRANSPORT STREAM Organization: SMPTE
Date: 2010-11-12
Description: This standard describes the physical interface and modulation characteristics for a synchronous serial interface to carry MPEG-2 transport bit streams at rates up to 40 Mb/s.
SAE J2610 - SERIAL DATA COMMUNICATION INTERFACE Organization: SAE
Date: 2015-01-01
Description: Purpose The purpose of this SAE Information Report is to specify the requirements necessary to fully define the Serial Data Communication Interface (SCI) used in the reprogramming of emission-related powertrain Electronic Control Units (ECU) in Fiat Chrysler Automobiles (FCA) vehicles.
IEEE 595 - STANDARD SERIAL HIGHWAY INTERFACE SYSTEM (CAMAC) Organization: IEEE
Date: 1981-09-17
Description: [This Foreword is not a part of ANSI/IEEE Std 595-1982, IEEE Standard Serial Highway Interface System (CAMAC).]This standard defines a serial highway interface system for use with CAMAC crate assemblies in accordance with ANSI/IEEE Std 583-1982, Modular Instrumentation and Digital Interface System (CAMAC), and with other controlled devices.
SMPTE ST 352 - PAYLOAD IDENTIFICATION CODES FOR SERIAL DIGITAL INTERFACES Organization: SMPTE
Date: 2013-02-05
Description: This standard defines the specification of a 4-byte payload identifier that describes aspects of the payload carried on the SMPTE Serial Digital Interface (SDI) such as: the digital interface standard; picture rate; sampling structure; aspect ratio; colorimetry; bit depth and channel or link assignment.
BSI - BS DD 153 - S5/8 SERIAL INTERFACE FOR THE INTERCONNECTION OF DATA PROCESSING EQUIPMENT Organization: BSI
Date: 1990-10-31
Description: Specifies a serial interface for the interconnection of data processing equipment. Primarily intended for low cost equipment, e.g. portable micro-computers and peripherals.
SMPTE ST 425-3 - IMAGE FORMAT AND ANCILLARY DATA MAPPING FOR THE DUAL LINK 3 GB/S SERIAL INTERFACE Organization: SMPTE
Date: 2015-03-26
Description: This standard defines 1080-line and 2160-linemapping formats as described below; 1080-line mapping specifies: The mapping of the image formats of 1920 × 1080 and 2048 × 1080 pixels listed in Table 2 into four parallel 10-bit data streams (known as data stream one, data stream two, data stream three and data stream four) of a 40-bit virtual interface, followed by the mapping of these four 10-bit data streams onto the Dual Link 3 Gb/s Serial Interface (3G-SDI Link 1 and Link 2) via two 20-bit virtual interfaces. 2160-line mapping specifies: The mapping of the image formats of 3840 × 2160 and 4096 × 2160 pixels listed in Table 3 into four parallel 10-bit data streams (known as data stream one, data stream two, data stream three and data stream four) of a 40-bit virtual interface, followed by the mapping of these four 10-bit data streams on to the Dual Link 3 Gb/s Serial Interface (3G-SDI Link 1 and Link 2) via two 20-bit virtual interfaces.
SMPTE 425-0 - SMPTE BIT-SERIAL INTERFACES AT 3 GB/S - ROADMAP FOR THE 425 DOCUMENT SUITE Organization: SMPTE
Date: 2014-02-20
Description: Document Roadmap The SMPTE 425 suite of documents defines the mapping of various source image formats onto a single link, dual link and quad link serial digital interfaces operating at a nominal rate of 3 Gb/s.
SMPTE ST 425-0 - SMPTE BIT-SERIAL INTERFACES AT 3 GB/S - ROADMAP FOR THE 425 DOCUMENT SUITE Organization: SMPTE
Date: 2012-06-21
Description: Document Roadmap The SMPTE 425 suite of documents defines the mapping of various source image formats onto a single link, dual link and quad link serial digital interfaces operating at a nominal rate of 3 Gb/s.
SMPTE ST 425-5 - IMAGE FORMAT AND ANCILLARY DATA MAPPING FOR THE QUAD LINK 3 GB/S SERIAL INTERFACE Organization: SMPTE
Date: 2015-03-26
Description: This standard defines the mapping of the image formats of 3840×2160 and 4096×2160 pixels listed in Table 1 into eight parallel 10-bit data streams (known as data stream one, data stream two, data stream three, data stream four, data stream five, data stream six, data stream seven and data stream eight) of an 80-bit virtual interface, followed by the mapping of these eight 10-bit data streams onto the Quad Link 3 Gb/s Serial Interface (3G-SDI Link 1, Link 2, Link 3 and Link 4) via four 20-bit virtual interfaces. This standard also defines the carriage of ancillary data such as the audio data, the audio control packets, the Payload Identifier and the time code.
SMPTE ST 425-1 - SOURCE IMAGE FORMAT AND ANCILLARY DATA MAPPING FOR THE 3 GB/S SERIAL INTERFACE Organization: SMPTE
Date: 2014-05-13
Description: Level B Dual-Link mapping specifies: The mapping of the SMPTE ST 372 Dual Link interface (Dual-Link mapping) as defined in Table 13 into a serial digital interface operating at a nominal rate of 3 Gb/s.
ITU-R BT.1365 - 24-BIT DIGITAL AUDIO FORMAT AS ANCILLARY DATA SIGNALS IN HDTV AND UHDTV SERIAL INTERFACES Organization: ITU-R
Date: 2015-10-01
Description: This Recommendation defines the mapping of 24-bit digital audio data conforming with Recommendation ITU-R BS.647 and associated control information into the ancillary data space of serial digital video interfaces conforming to Recommendation ITU-R BT.1120 and Recommendation ITU-R BT.2077.
SMPTE OV 2081-0 - 6G-SDI BIT-SERIAL INTERFACES - OVERVIEW FOR THE SMPTE ST 2081 DOCUMENT SUITE Organization: SMPTE
Date: 2016-07-15
Description: Document Overview The SMPTE ST 2081 suite of documents defines the mapping of various source image formats onto a single-link, dual-link and quad-link serial digital interface operating at a nominal rate of 6 Gb/s.
SMPTE OV 2082-0 - 12G-SDI BIT-SERIAL INTERFACES - OVERVIEW FOR THE SMPTE ST 2082 DOCUMENT SUITE Organization: SMPTE
Date: 2016-07-15
Description: Document Overview The SMPTE ST 2082 suite of documents defines the mapping of various source image formats onto a single-link, dual-link and quad-link serial digital interface operating at a nominal rate of 12 Gb/s.
SMPTE 2082-0 - 12G-SDI BIT-SERIAL INTERFACES - OVERVIEW FOR THE SMPTE ST 2082 DOCUMENT SUITE Organization: SMPTE
Date: 2015-02-04
Description: Document Overview The SMPTE ST 2082 suite of documents defines the mapping of various source image formats onto a singlelink, dual-link and quad-link serial digital interface operating at a nominal rate of 12 Gb/s.
SMPTE 2081-0 - SMPTE BIT-SERIAL INTERFACES AT 6 GB/S - OVERVIEW FOR THE SMPTE ST 2081 DOCUMENT SUITE Organization: SMPTE
Date: 2015-02-04
Description: Overview The SMPTE ST 2081 suite of documents defines the mapping of various source image formats onto a singlelink, dual-link and quad-link serial digital interface operating at a nominal rate of 6 Gb/s.

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