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JEDEC JESD 217

Test Methods to Characterize Voiding in Pre-SMT Ball Grid Array Packages

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Organization: JEDEC
Publication Date: 1 October 2016
Status: active
Page Count: 46
scope:

This publication provides an overview of solder void types, outlines current metrologies and test methods used for pre-SMPT solder void characterization and potential limitations, and prescribes sampling strategy for data collection, and tolerance guidelines for corrective measures.

Test methods can be applied to several types of ball grid array packages such as FCBGA, PBGA, CBGA, and CCGA with minimum 0.5 mm ball-to-ball pitch and constructed with leaded and lead-free solder alloys.

Guidelines for pre-SMT voids may not be sufficiently robust where ball grid array packages balls are assembled onto unfilled micro-via structures on package substrate land.

Document History

JEDEC JESD 217
October 1, 2016
Test Methods to Characterize Voiding in Pre-SMT Ball Grid Array Packages
This publication provides an overview of solder void types, outlines current metrologies and test methods used for pre-SMPT solder void characterization and potential limitations, and prescribes...
September 1, 2010
Test Methods to Characterize Voiding in Pre-SMT Ball Grid Array Packages
This publication provides an overview of solder void types, outlines current metrologies and test methods used for pre-SMPT solder void characterization and potential limitations, and prescribes...

References

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