scope:

Introduction

One of the basic design objectives of the Solid State Interlocking Project was to create a system which would not require the signal engineer to use computer programming techniques in order to define the Interlocking logic. This has been achieved by the provision of an Interlocking program which remains the same for any application. The logic required for any particular signalling area is provided to the program in the form of tables of data which are held in the Interlocking Processor's memory.

The objectives of this document are to show how the data and program work together to carry out the Interlocking function and how data may be prepared in order to achieve particular requirements. It is assumed that a scheme plan has been obtained and that the allocation of Trackside Functional Modules has been made. The data examples in the main body of this document have been limited for ease of understanding. Details of data preparation for some of the more complex and unusual situations are included in a series of Supplements which will be updated and added to as experience in the application of SSI develops.