scope:

This standard applies to Configurable Logic Devices (CLDs) to the extent identified in applicable requirements or contractual documentation.

The intent of this standard is to define requirements to ensure CLD development is managed appropriately, in order to ensure delivery and fielding of robust CLD hardware. A robust device does not contain systematic undesirable features and will respond predictably to various conditions and environments. A reliable device is robust and can demonstrate performance over a period of time based on lifetime (random) failure statistical data.

Planning requires establishing standards and methodologies that are used, researching and analyzing tools, and then procuring those necessary to manage and execute the project.

Compliance with these process requirements is accomplished through technical insight, participation in requirements, design, and status reviews, participation in test readiness reviews, and review of documentation, including the development plans. Specific responsibilities are defined in section 4.1.

Although various aspects of the design of FPGA and ASIC devices are sometimes referred to as "firmware," the usage of that terminology does not establish an equivalence to the term "firmware" as used in NASA Procedural Requirement (NPR) 7150.2, NASA Software Engineering Requirements. Therefore, the requirements of NPR 7150.2 are not applicable to CLD designs, although some developing organizations may apply those methodologies and processes successfully in CLD designs. Current NASA approaches to CLD development are addressed in the NASA Engineering and Safety Center Technical Assessment Report, NESCRP- 09-00546 "Development, Design, Test, and Evaluation Process for Robustness of Space Flight Programmable Logic Devices." This standard is developed consistent with that approach.

Note: When a processor is embedded within a CLD, from a software perspective, the processor is no different from a processor that is a discrete "chip." As such, while the design and implementation of that processor into the CLD is covered by this standard, the software that will execute on that processor is covered by the NPR 7150.2 definition and requirements.