Standard: IEEE 1012

SYSTEM, SOFTWARE, AND HARDWARE VERIFICATION AND VALIDATION

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Scope:

This verification and validation (V&V) standard is a process standard that addresses all system, software, and hardware life cycle processes including the Agreement, Organizational Project-Enabling, Project, Technical, Software Implementation, Software Support, and Software Reuse process groups. This standard is compatible with all life cycle models (e.g., system, software, and hardware); however, not all life cycle models use all of the processes listed in this standard.

V&V processes determine whether the development products of a given activity conform to the requirements of that activity and whether the product satisfies its intended use and user needs. This determination may include the analysis, evaluation, review, inspection, assessment, and testing of products and processes.

The user of this standard may invoke those life cycle processes and the associated V&V processes that apply to the project. A description of system life cycle processes may be found in ISO/IEC/IEEE 15288:2015(E) [B16], 1 and a description of software life cycle processes may be found in ISO/IEC 12207:2008 [B11]. Annex A maps ISO/IEC/IEEE 15288:2015(E) [B16] (Table A.1 and Table A.2) and ISO/IEC 12207:2008 [B11] (Table A.3 and Table A.4) to the V&V activities and tasks defined in this standard.

This standard defines the verification and validation processes that are applied to the system, software, and hardware development throughout the life cycle, including acquisition, supply, development, operations,

Purpose

The purpose of this standard is to:

Establish a common framework of the V&V processes, activities, and tasks in support of all system, software, and hardware life cycle processes.

Define the V&V tasks, required inputs, and required outputs in each life cycle process.

Identify the minimum V&V tasks corresponding to a four-level integrity schema.

Define the content of the Verification and Validation Plan

 

NASA Notes:
  • This is an excellent description and approach to V&V. This
    standard should be selected for mission critical software.
    However, the following caveat applies. There are minor
    discrepancies between the contents of the verification plan
    and validation plan defined in IEEE12207.1 and the
    requirements of IEEE 1012-1998. These are identified in the
    mapping supplement of IEEE 1012a-1998. The discrepancies are essentially in the generic content requirements of IEEE 12207.1. They are: 1) D
Organization: The Institute of Electrical and Electronics Engineers, Inc.
Document Number: ieee 1012
Publish Date: 2016-01-01
Page Count: 260
Change Type: CRGD
Available Languages: EN
DOD Adopted: NO
ANSI Approved: NO
Most Recent Revision: YES
Current Version: YES
Status: Active

Document History

Document # Change Type Update Date Revision Status
IEEE 1012 Change Type: STCH Update Date: 2012-03-29 Revision: 12 Status: INAC
IEEE 1012 Change Type: Update Date: 2004-12-08 Revision: 04 Status: INAC
IEEE 1012 Change Type: Update Date: 1998-03-09 Revision: 98 Status: INAC
IEEE 1012 Change Type: Revision: 7.0 Status: INAC
IEEE 1012 Change Type: REAF Update Date: 1986-01-01 Revision: 86 Status: INAC
IEEE 1012 Change Type: Revision: 86 Status: INAC
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