DLA - SMD-5962-94761
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ELECTRICALLY ERASABLE PROGRAMMABLE LOGIC DEVICE, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 21 December 1994 |
| Status: | inactive |
| Page Count: | 20 |
scope:
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
The PIN shall be as shown in the following example:
Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
The device type(s) shall identify the circuit function as follows:
Maximum Device type Generic number Circuit function clock frequency 01 ispLSI1024 EECMOS 4,000 gate in-system 60 MHz programmable logic device
The device class designator shall be a single letter identifying the product assurance level as follows:
Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535
The case outline(s) shall be as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style X CQCC2-J68 68 J-Leaded chip carrier
The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.
Supply voltage range . . . . . . . . . . . . . . . . . . . −0.5 Vdc to +7.0 V dc Input voltage range (applied) . . . . . . . . . . . . . . . −2.5 Vdc to VCC + 1.0 Vdc Off-state output voltage range applied. . . . . . . . . . . −2.5 Vdc to VCC + 1.0 Vdc Thermal resistance, junction-to-case (θJC). . . . . . . . . See MIL-STD-1835 Maximum power dissipation (PD) 2/ . . . . . . . . . . . . 2.1 W Maximum junction temperature . . . . . . . . . . . . . . . +175°C Lead temperature (soldering, 10 seconds max) . . . . . . . +300°C Data retention (at +55°C) . . . . . . . . . . . . . . . . . 20 years (minimum) Endurance . . . . . . . . . . . . . . . . . . . . . . . . . 1000 erase/write cycles (minimum)
Supply voltage range, VCC . . . . . . . . . . . . . . . . .4.5 Vdc to 5.5 Vdc High level input voltage range (VIH) . . . . . . . . . . .2.0 V dc to VCC + 1.0 V dc Low level input voltage range (VIL) . . . . . . . . . . .0.0 V dc to 0.8 V dc Case operating temperature range, TC . . . . . . . . . . .−55°C to +125°C
Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012). . . . . . . . . . .XX percent 3/
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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