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DLA - DSCC-VID-V62/18606

MICROCIRCUIT, LINEAR-DIGITAL, DUAL CORE MICROCONTROLLER, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 28 August 2018
Status: inactive
Page Count: 59

Document History

DSCC-VID-V62/18606 REV A
November 20, 2023
MICROCIRCUIT, LINEAR-DIGITAL, DUAL CORE MICROCONTROLLER, MONOLITHIC SILICON
Scope. This drawing documents the general requirements of a high performance dual Core Microcontroller with an operating temperature range of -55°C to +125°C.
DSCC-VID-V62/18606
August 28, 2018
MICROCIRCUIT, LINEAR-DIGITAL, DUAL CORE MICROCONTROLLER, MONOLITHIC SILICON
A description is not available for this item.

References

This document references:
IEEE 802.3 - Standard for Ethernet Amendment 4: Physical Layers and Management Parameters for 50 Gb/s, 200 Gb/s, and 400 Gb/s Operation over Single‐Mode Fiber
Published by IEEE on November 7, 2019
Abstract: This amendment to IEEE Std 802.3-2018 adds Physical Layer (PHY) specifications and management parameters for 50 Gb/s, 200 Gb/s, and 400 Gb/s operation over single-mode fiber with reaches of...
This document references:
JEP95 BOOK 1 - Book One Registered and Standard Outlines for Solid State and Related Products
Published by JEDEC on March 1, 1997
PREFACE This Publication contains those solid state product outlines and other associated drawings that have been registered and assigned a JEDEC designation and are printed on white paper. Product...
This document references:
JS-001 - Electrostatic Discharge Sensitivity Testing Human Body Model (HBM) - Device Level
Published by JEDEC on May 1, 2023
This standard establishes the procedure for testing, evaluating, and classifying devices and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a...
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