IEC - 61691-6
Behavioural languages – Part 6: VHDL Analog and Mixed-Signal Extensions
| Organization: | IEC |
| Publication Date: | 1 June 2021 |
| Status: | active |
| Page Count: | 675 |
| ICS Code (Languages used in information technology): | 35.060 |
| ICS Code (Industrial automation systems in general): | 25.040.01 |
scope:
This standard defines the IEEE 1076.1™ language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. Informally called VHDL-AMS (VHSIC Hardware Description Language for Analog and Mixed-Signal, where VHSIC stands for Very High Speed Integrated Circuits), the language is built on the IEEE 1076™ (VHDL) language and extends it to provide capabilities of writing and simulating analog and mixed-signal models.
Purpose
To support the design and verification of complex electronic systems containing a mixture of analog and digital devices, the IEEE 1076.1 language provides, as an extension of the IEEE VHDL 1076 language, a comprehensive set of capabilities for the description and simulation of mixed-signal and mixed-technology systems.
The revision adds selected new features to the language definition of IEEE Std 1076.1-2007, and it updates that standard to reflect changes in the VHDL specification, IEEE Std 1076-2008.1
1Information on references can be found in Clause 2.
Document History
