scope:

This method describes a means of electrically operating GaN power switching devices in a continuous-switching circuit and determining dynamic switching waveforms and I-V loci for the continuous-switching test. The test method can be applied to the following:

a) GaN enhancement- and depletion-mode discrete power devices

b) GaN integrated power solutions

A packaged device-under-test (DUT) typically exhibits a more realistic stress profile than a wafer-level test by including the interactions with parasitic elements as well as cumulative self-heating and mechanical effects. However, the methodologies covered herein are valid at the wafer level for technology characterization, with proper consideration of the probe connections and their impacts on results.

This document is not intended to cover the underlying mechanisms of device degradation or failure but gives a general guidance on circuits and test methods that may be used to implement stress procedures and define stress conditions, such as JEP180. This test method may be used for any high speed power switching device.