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JEDEC - JESD82-30.01

LRDIMM DDR3 Memory Buffer (MB)

active, Most Current
Organization: JEDEC
Publication Date: 1 January 2023
Status: active
Page Count: 320

Document History

JESD82-30.01
January 1, 2023
LRDIMM DDR3 Memory Buffer (MB)
A description is not available for this item.
JEDEC JESD 82-30
October 1, 2014
LRDIMM DDR3 Memory Buffer (MB) Version 1.0
A description is not available for this item.

References

This document references:
JEDEC JESD 79-3 - DDR3 SDRAM Specification
Published by JEDEC on July 1, 2012
This document defines the DDR3 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Specification is to...
This document references:
JEDEC JESD 8-11 - 1.5 V +/- 0.1 V (Normal Range) and 0.9 V – 1.6 V (Wide Range) Power Supply Voltage and Interface Standard for Nonterminated Digital Integrated Circuits
Published by JEDEC on September 1, 2007
This new standard provides specifications that will be used by several companies in new 1.5 V products designed in 0.12-0.15 um CMOS technologies, and in components that interface with them. The...
This document references:
JESD82-29A.01 - Definition of the SSTE32882 Registering Clock Driver with Parity and Quad Chip Selects for DDR3/DDR3L/DDR3U RDIMM 1.5 V/1.35 V/1.25 V Applications
Published by JEDEC on September 1, 2022
This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTE32882 registered buffer with parity for driving address and...
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