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JEDEC - JESD301-1A.02

PMIC50x0 Power Management IC Standard

active, Most Current
Organization: JEDEC
Publication Date: 1 March 2023
Status: active
Page Count: 208
scope:

This standard defines the specifications of interface parameters, signaling protocols, and features for PMIC device as used for memory module applications. The designation PMIC5000, PMIC5010 refers to the device specified by this document.

The purpose is to provide a standard for the PMIC5000, PMIC5010 device for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.

Unless otherwise noted in the document, any illegal operation is not allowed and device operation is not guaranteed.

NOTE: The designation PMIC5000, PMIC5010 refers to a portion of the part number designation of a series of commercial logic devices common in the industry. This number is normally preceded by a series of manufacturer specific characters to make up a complete part designation.

Document History

JESD301-1A.02
March 1, 2023
PMIC50x0 Power Management IC Standard
This standard defines the specifications of interface parameters, signaling protocols, and features for PMIC device as used for memory module applications. The designation PMIC5000, PMIC5010 refers...
October 1, 2022
PMIC50x0 Power Management IC Standard
This standard defines the specifications of interface parameters, signaling protocols, and features for PMIC device as used for memory module applications. The designation PMIC5000, PMIC5010 refers...
August 1, 2021
PMIC50x0 Power Management IC Standard
This standard defines the specifications of interface parameters, signaling protocols, and features for PMIC device as used for memory module applications. The designation PMIC5000, PMIC5010 refers...
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