DLA - SMD-5962-87671 REV D
MICROCIRCUIT, DIGITAL, MEMORY, BIPOLAR, PROGRAMMING LOGIC, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 21 April 1993 |
| Status: | inactive |
| Page Count: | 24 |
scope:
This drawing describes device requirements for class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices".
The complete PIN shall be as shown in the following example:
The device type(s) shall identify the circuit function as follows:
Device type Generic number Circuit function 01 PAL20L8B 20-input 8-output AND-OR invert gate array 02 PAL20R8B 20-input 8-output registered AND-OR gate array 03 PAL20R6B 20-input 6-output registered AND-OR gate array 04 PAL20R4B 20-input 4-output registered AND-OR gate array 05 PLUS20L8 20-input 8-output AND-OR invert gate array 06 PLUS20R8 20-input 8-output registered AND-OR gate array 07 PAL20L8-15 20-input 8-output AND-OR invert gate array 08 PAL20R8-15 20-input 8-output registered AND-OR gate array 09 PAL20R6-15 20-input 6-output registered AND-OR gate array 10 PAL20R4-15 20-input 4-output registered AND-OR gate array 11 PAL20L8-12 20-input 8-output AND-OR invert gate array 12 PAL20R8-12 20-input 8-output registered AND-OR gate array 13 PAL20R6-12 20-input 6-output registered AND-OR gate array 14 PAL20R4-12 20-input 4-output registered AND-OR gate array 15 PAL20L8-10 20-input 8-output AND-OR invert gate array 16 PAL20R8-10 20-input 8-output registered AND-OR gate array 17 PAL20R6-10 20-input 6-output registered AND-OR gate array 18 PAL20R4-10 20-input 4-output registered AND-OR gate array 19 PAL20R8-7 20-input 8-output registered AND-OR gate array
The case outline(s) shall be as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 Flat pack L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 3 CQCC1-N28 28 Square leadless chip carrier
The lead finish shall be as specified in MIL-M-38510. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.
Supply voltage range . . . . . . . . . . . . . . . . . . −0.5 V dc to + 7.0 V dc Input voltage range . . . . . . . . . . . . . . . . . . . −1.5 V dc at −18 mA to +5.5 V dc Storage temperature range . . . . . . . . . . . . . . . . −65°C to +150°C Lead temperature (soldering, 10 seconds) . . . . . . . . +260°C Thermal resistance, junction-to-case (ΘJC) 1/ . . . . . . See MIL-STD-1835 Output voltage applied . . . . . . . . . . . . . . . . . 5.5 V dc Output sink current . . . . . . . . . . . . . . . . . . . 100 mA Maximum power dissipation (PD) 2/ . . . . . . . . . . . . 1.2 W Maximum junction temperature (TJ) . . . . . . . . . . . . +175°C
Supply voltage (VCC) . . . . . . . . . . . . . . . . . 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) . . . . . . . . 2.0 V dc Maximum low level input voltage (VIL) . . . . . . . . . 0.8 V dc Case operating temperature range (TC) . . . . . . . . . −55°C to +125°C
intended Use:
Microcircuits conforming to this drawing are intended for use when military specifications do not exist and qualified military devices that will perform the required function are not available for... View More
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