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DLA - SMD-5962-95843

MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, OCTAL TRANSPARENT D-TYPE LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 2 November 1995
Status: inactive
Page Count: 19
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class 8 microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function 01 54ABT533 Octal transparent D-type latch with three-state outputs, TTL compatible inputs

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square chip carrier

The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range (VCC) . . . . . . . . . . . . . . . . . . . . . . . −0.5 V dc to +7.0 V dc DC input voltage range (VIN) . . . . . . . . . . . . . . . . . . . . . . −0.5 V dc to +7.0 V dc 4/ DC output voltage range (VOUT) . . . . . . . . . . . . . . . . . . . . . −0.5 V dc to +5.5 V dc 4/ DC output current (IOL) (per output) . . . . . . . . . . . . . . . . . . +96 mA DC input clamp current (IIK) (VIN < 0.0 V ) . . . . . . . . . . . . . . −18 mA DC output clamp current (IOK) (VOUT < 0.0 V) . . . . . . . . . . . . . . −50 mA Storage temperature range (TSTG) . . . . . . . . . . . . . . . . . . . . −65°C to +150°C Lead temperature (soldering, 10 seconds) . . . . . . . . . . . . . . . . +300°C Thermal resistance, junction-to-case (ΘJC) . . . . . . . . . . . . . . . See MIL-STD-1835 Junction temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . +175°C Maximum power dissipation (PD) . . . . . . . . . . . . . . . . . . . . . 500 mW

Supply voltage range (VCC) . . . . . . . . . . . . . . . . . . . . . . . +4.5 V dc to +5.5 V dc Input voltage range (VIN) . . . . . . . . . . . . . . . . . . . . . . . +0.0 V dc to VCC Maximum low level input voltage (VIL) . . . . . . . . . . . . . . . . . +0.8 V Minimum high level input voltage (VIH) . . . . . . . . . . . . . . . . . +2.0 V Maximum high level output current (IOH). . . . . . . . . . . . . . . . . +24 mA Maximum low level output current (IOL) . . . . . . . . . . . . . . . . . +48 mA Maximum input rise or fall rate (Δt/ΔV). . . . . . . . . . . . . . . . . 10 ns/V Case operating temperature range (TC) . . . . . . . . . . . . . . . . . −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) . . . . . . . . . . . . . XX percent 5/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

January 15, 2021
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, OCTAL TRANSPARENT D-TYPE LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q) and space application (device class V). A choice of case outlines and lead finishes...
February 28, 2014
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, OCTAL TRANSPARENT D-TYPE LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
August 22, 2007
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, OCTAL TRANSPARENT D-TYPE LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
SMD-5962-95843
November 2, 1995
MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, OCTAL TRANSPARENT D-TYPE LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and...
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