DLA - SMD-5962-90910
MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCE SCHOTTKY, TTL, OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLOCK ENABLE, MONOLITHIC SILICON
| Organization: | DLA |
| Publication Date: | 26 August 1991 |
| Status: | inactive |
| Page Count: | 14 |
scope:
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and space application (device classes S and V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN.
The PIN shall be as shown in the following example:
Device classes M, B, and S RHA marked devices shall meet the MIL-M-38510 specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
The device type(s) shall identify the circuit function as follows:
Device type Generic number Circuit function 01 54F377 Octal edge-triggered D-type flip-flop with clock enable
The device class designator shall be a single letter identifying the product assurance level as follows:
Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 B or S Certification and qualification to MIL-M-38510 Q or V Certification and qualification to MIL-I-38535
For device classes M, B, and S, case outline(s) shall meet the requirements in appendix C of MIL-M-38510 and as listed below. For device classes Q and V, case outline(s) shall meet the requirements of MIL-I-38535, appendix C of MIL-M-38510, and as listed below.
Outline letter Case outline R D-8 (20-lead, 1.060" × .310" × .200"), dual-in-line package S F-9 (20-lead, .540" × .300" × .100"), flat package 2 C-2 (20-terminal, .358" × .358" × .100"), square chip carrier package
The lead finish shall be as specified in MIL-M-38510 for classes M, B, and S or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.
Supply voltage range - - - - - - - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc Input voltage range - - - - - - - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc Storage temperature range - - - - - - - - - - - - - - - - −65°C to +150°C Lead temperature (soldering, 10 seconds) - - - - - - - - - +300°C Thermal resistance, junction-to-case (ΘJC) - - - - - - - - See MIL-M-38510, appendix C Junction temperature (TJ) - - - - - - - - - - - - - - - - +175°C Maximum power dissipation (PD) 2/ - - - - - - - - - - - - 308 mW
Supply voltage range (VCC) - - - - - - - - - - - - - - - - +4.5 V dc to +5.5 V dc Case operating temperature range (TC)- - - - - - - - - - - −55°C to +125°C Minimum high level input voltage (VIH) - - - - - - - - - - 2.0 V dc Maximum low level input voltage (VIL) - - - - - - - - - - 0.8 V dc Minimum setup time (tS): High, ([C bar][E bar] to CP) - - - - - - - - - - - - - - - - - - - - 4.0 ns Low, ([C bar][E bar] to CP) - - - - - - - - - - - - - - - - - - - - 5.0 ns Minimum setup time (tS): High, (Dn to CP) - - - - - - - - - - - - - - - - - - - - 3.5 ns Low, (Dn to CP) - - - - - - - - - - - - - - - - - - - - 4.0 ns Minimum hold time (tH): High, ([C bar][E bar] to CP) - - - - - - - - - - - - - - - - - - - - 1.5 ns Low, ([C bar][E bar] to CP) - - - - - - - - - - - - - - - - - - - - 2.5 ns Minimum hold time (tH): High or low, (Dn to CP) - - - - - - - - - - - - - - - - 1.0 ns Minimum clock pulse width (tW): High or low, (CP) - - - - - - - - - - - - - - - - - - - 5.0 ns Maximum clock frequency (Fmax): VCC = 5.0 V dc at +25°C - - - - - - - - - - - - - - - - 100 MHz VCC = 4.5 to 5.5 V dc at −55°C/125°C - - - - - - - - - - 85 MHz
Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - - - - - XX percent 3/
intended Use:
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
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