ASTM International - ASTM F1810-97(2002)
Standard Test Method for Counting Preferentially Etched or Decorated Surface Defects in Silicon Wafers (Withdrawn 2003)
|Publication Date:||10 June 1997|
|ICS Code (Semiconducting materials):||29.045|
This standard was transferred to SEMI (www.semi.org) May 2003
1.1 This test method describes the technique to count the density of surface defects in silicon wafers by microscopic analysis.
Note 1-Practical use of a defect counting method requires an assumption be made that defects are randomly distributed on the surface. If this assumption is not met, the accuracy and precision of this test method will be diminished.
1.2 Application of this test method is limited to specimens that have discrete, identifiable artifacts on the surface of the silicon sample. Typical samples have been preferentially etched according to Guide F 1809 or epitaxially deposited, forming defects in a silicon layer structure.
1.3 Wafer thickness and diameter for this test method is limited only by the range of microscope stage motions available.
1.4 This test method is applicable to silicon wafers with defect density between 0.01 and 10 000 defects per cm2.
Note 2-The commercially significant defect density range is between 0.01 to 10 defects per cm2, but this test method extends to higher defect levels due and improved statistical sampling obtained with higher counts.
1.5 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.