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NPFC - MIL-M-38510/33

MICROCIRCUITS, DIGITAL, DTL, FLIP FLOPS, MONOLITHIC SILICON

active, Most Current
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Organization: NPFC
Publication Date: 9 August 1983
Status: active
Page Count: 29
scope:

This specification covers the detail requirements for monolithic silicon, DTL, logic microcircuits. One product assurance class and a choice of case outlines and lead finishes are provided and are reflected in the complete part number.

The complete part number shall be in accordance with MIL-M-38510, with the exception that the "JAN" or "J" certification shall not be used.

The device type shall be as follows:

Device type Circuit 01 RS/JK clocked flip flop 02 RS/JK clocked flip flop 03 Pulse triggered binary 04 Dual JK flip flop

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outline shall be designated as follows:

Outline letter Case outline (see MIL-M-38510, appendix C) A F-1 (14-lead, ¼" × ¼"), flat package B F-3 (14-lead, 3/16" × ¼"), flat package C D-1 (14-lead, ¼" × ¾"), dual-in-line package D F-2 (14-lead, ¼" × ⅜"), flat package

Supply voltage range - - - - - - - - - - - - −0.5 V dc to +8.0 V dc Input voltage range- - - - - - - - - - - - - −1.5 V dc to +6.5 V dc Storage temperature range- - - - - - - - - - −65°C to +150°C Maximum power dissipation, per gate (PD) - - 8.5 mW dc Lead temperature (soldering, 10 seconds) - - +300°C Thermal resistance, junction-to-case (θJC): Cases A, B, and D- - - - - - - - - - - - - 0.09°C/mW Case C - - - - - - - - - - - - - - - - - - 0.08°C/mW Junction temperature (TJ)- - - - - - - - - - +175°C

Beneficial comments (recommendations additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RBE-2), Griffiss AFB, NY 13441, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.

Supply voltage range (VCC) - - - - - - - +4.5 V dc minimum to +5.5 V dc maximum Minimum high-level input) voltage (VIH)- +1.9 V dc @ +25°C Maximum low-level input voltage (VIL) - +1.1 V dc @ +25°C Normalized fanout (each output). Device types 01 and 04 - - - - - - - - 10 maximum Device type 02 - - - - - - - - - - - - 9 maximum Device type 03 - - - - - - - - - - - - 8 maximum Case operating temperature range (TC) - −55°C to +125°C

intended Use:

Microcircuits conforming to this specification are intended for logistic support of existing equipment.

Document History

MICROCIRCUITS, DIGITAL, DTL, FLIP FLOPS, MONOLITHIC SILICON
A description is not available for this item.
November 30, 1988
MICROCIRCUITS, DIGITAL, DTL, FLIP FLOPS, MONOLITHIC SILICON
A description is not available for this item.
MIL-M-38510/33
August 9, 1983
MICROCIRCUITS, DIGITAL, DTL, FLIP FLOPS, MONOLITHIC SILICON
Microcircuits conforming to this specification are intended for logistic support of existing equipment.
July 19, 1976
MICROCIRCUITS, DIGITAL, DTL, FLIP FLOPS, MONOLITHIC SILICON
A description is not available for this item.
June 30, 1975
MICROCIRCUITS, DIGITAL, DTL, FLIP FLOPS, MONOLITHIC SILICON
A description is not available for this item.
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