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NPFC - MIL-M-38510/665

MICROCIRCUITS, DIGITAL, HIGH SPEED, CMOS SHIFT REGISTER, MONOLITHIC SILICON

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Organization: NPFC
Publication Date: 31 August 1988
Status: active
Page Count: 46
scope:

This specification covers the detail requirements for monolithic silicon, high speed, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the complete Part or Identifying Number (PIN).

Microcircuits covered by this specification shall be of the following (see 6.2).

The device types shall be as follows:

Device type Circuit 01 8 bit parallel-out shift register 02 8 bit parallel-in shift register with clock inhibit 03 8 bit parallel-in shift register with clear 04 4 bit bi-directional shift register 05 4 bit parallel-access shift register 06 8 bit bi-directional universal shift/storage register with three-state outputs 07 8 bit shift register with output latch and three-state outputs

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outlines shall be designated as follows:

Outline letter Case outline (see MIL-M-38510, appendix C) C D-1 (14-lead, .785" × .310" × .200"), dual-in-line package D F-2 (14-lead, .280" × .260" × .085"), flat package E D-2 (16-lead, .840" × .310" × .200"), dual-in-line package F F-5 (16-lead, .440" × .285" × .085"), flat package R D-8 (20-lead, 1.060" × .310" × .200"), dual-in-line package S F-9 (20-lead, .530" × .355" × .090"), flat package 2 C-2 (20 terminal, .358" × .358" × .100"), square chip carrier package

Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RBE-2), Griffiss AFB, NY 13441, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.

Supply voltage (VCC) - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc DC input voltage (VIN) - - - - - - - - - - - - −0.5 V dc to VCC +0.5 V dc DC output voltage (VOUT) - - - - - - - - - - - −0.5 V dc to VCC +0.5 V dc Clamp diode current (IIK, IOK) - - - - - - - - ±20 mA DC output current per pin (IOUT): Devices 01-07 - - - - - - - - - - - - - - - ±25 mA Devices 06-07 - - - - - - - - - - - - - - - ±35 mA (see table I, 3/) DC VCC or GND current per pin (ICC): Devices 01-07 - - - - - - - - - - - - - - - ±50 mA Devices 06-07 - - - - - - - - - - - - - - - ±70 mA (see table I, 3/) Storage temperature range (TSTG) - - - - - - - −65°C to +150°C Maximum power dissipation (PD) - - - - - - - - +300 mW Lead temperature (soldering, 10 seconds) - - - +300°C Thermal resistance (θJC): Cases C, D, E, F, R, S, and 2 - - - - - - - See MIL-M-38510, appendix C Junction temperature (TJ)- - - - - - - - - - - +175°C

Input low (VIL) maximum voltage - - - - - - - 0.3 V at VCC = 2 V 0.9 V at VCC = 4.5 V 1.2 V at VCC = 6 V Input high (VIH) minimum voltage - - - - - - 1.5 V at VCC = 2 V 3.15 V at VCC = 4.5 V 4.2 V at VCC = 6 V Input rise and fall times (tr, tf) maximum: VCC = 2 V - - - - - - - - - - - - - - - - 1000 ns VCC = 4.5 V - - - - - - - - - - - - - - - 500 ns VCC = 6 V - - - - - - - - - - - - - - - - 400 ns Case operating temperature range (TC) - - - - −55°C to +125°C Minimum clock pulse width: Device types 0l, 02, 03, 04, 05, and 07 - 24 ns Device type 06- - - - - - - - - - - - - - 38 ns Minimum clear pulse width: Device types 03 and 06- - - - - - - - - - 38 ns Device type 01- - - - - - - - - - - - - - 30 ns Device types 04, 05, and 07 - - - - - - - 24 ns Minimum load pulse width: Device type 02- - - - - - - - - - - - - - 24 ns Minimum setup time at mode control: Device type 07 (SR, CK) - - - - - - - - - 30 ns Device type 04 (S1, S0) - - - - - - - - - 45 ns Minimum setup time at shift/1oad: Device type 03- - - - - - - - - - - - - - 45 ns Device types 02 and 05- - - - - - - - - - 30 ns Minimum setup time at serial data: Device types 05 and 06- - - - - - - - - - 38 ns Device type 07- - - - - - - - - - - - - - 45 ns Mintmum setup time at serial or parallel data: Device types 01, 02, 03, 04, and 05 - - - 30 ns Device type 06- - - - - - - - - - - - - - 38 ns Minimum setup time at inhibit: Device type 02 and 03 - - - - - - - - - - 30 ns Minimum hold time: Device types 01, 04, 05, 06, and 07 - - - 08 ns Device type 02- - - - - - - - - - - - - - 11 ns Device type 03- - - - - - - - - - - - - - 15 ns Minimum enable or inhibit time of clock: Device type 03- - - - - - - - - - - - - - 15 ns Maximum release time of shift/load: Device type 02- - - - - - - - - - - - - - 11 ns Device type 03- - - - - - - - - - - - - - 08 ns Minimum time of clear to clock(trem): Device types 01, 04, 05, and 06 - - - - - 30 ns Device type 03- - - - - - - - - - - - - - 23 ns Device type 07- - - - - - - - - - - - - - 15 ns

intended Use:

Microcircuits conforming to this specification are intended for original equipment design application and logistic support of existing equipment.

Document History

November 30, 2021
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February 15, 2012
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May 9, 2007
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July 25, 2002
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April 9, 1997
MICROCIRCUITS, DIGITAL, HIGH SPEED, CMOS SHIFT REGISTER, MONOLITHIC SILICON
A description is not available for this item.
MIL-M-38510/665
August 31, 1988
MICROCIRCUITS, DIGITAL, HIGH SPEED, CMOS SHIFT REGISTER, MONOLITHIC SILICON
This specification covers the detail requirements for monolithic silicon, high speed, CMOS, logic microcircuits. Two product assurance classes and a choice of case outlines and lead finishes are...

References

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