DS/CLC/R 217-004
JESSI 0.8 µm CMOS transistor model for analogue and digital circuit simulation
inactive, Most Current
| Organization: | DS |
| Publication Date: | 14 August 1997 |
| Status: | inactive |
| Page Count: | 44 |
| ICS Code (Integrated circuits. Microelectronics): | 31.200 |
scope:
This work has been performed as part of the European Microelectronics program JESSI within project AC41 Technology Assessment. This report describes the complete model equations of the JESSI 0.8 µm CMOS transistor model for analog and digital circuit simulation in the deep submicron region.
Document History
DS/CLC/R 217-004
August 14, 1997
JESSI 0.8 µm CMOS transistor model for analogue and digital circuit simulation
This work has been performed as part of the European Microelectronics program JESSI within project AC41 Technology Assessment. This report describes the complete model equations of the JESSI 0.8 µm...