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DLA - SMD-5962-91553

MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, OCTAL BUS TRANSCEIVER AND REGISTER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 30 January 1991
Status: inactive
Page Count: 20
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and space application (device classes S and V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device classes M, B, and S RHA marked devices shall meet the MIL-M-38510 Specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function 01 54BCT652 Octal bus transceivers and registers with three-state outputs

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 B or S Certification and qualification to MIL-M-38510 Q or V Certification and qualification to MIL-I-38535

For device classes M, B, and S, case outline(s) shall meet the requirements in appendix C of MIL-M-38510 and as listed below. For device classes Q and V, case outline(s) shall meet the requirements of MIL-I-38535, appendix C of MIL-M-38510, and as listed below.

Outline letter Case outline K F.6 (24-lead, .640" × .420" × .090"), flat package L D-9 (24-lead, 1.280" × .310" × .200"), dual-in-line package 3 C-4 (28-terminal, .460" × .460" × .100"), square chip carrier package

The lead finish shall be as specified in MIL-M-38510 for classes M, B, and S or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range VCC - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc DC input voltage (I/0 ports) - - - - - - - - - - - −0.5 V dc to +5.5 V dc DC input voltage (Excluding I/0 ports) - - - - - - −0.5 V dc to +7.0 V dc Voltage applied to a disabled 3-state output - - - −0.5 V dc to +5.5 V dc Voltage applied to any output in the high state - −0.5 V dc to VCC Current into any output in the low state - - - - - 96 mA Storage temperature range - - - - - - - - - - - - −65°C to +150°C Lead temperature (soldering, 10 seconds) - - - - - +300°C Thermal resistance, junction-to-case (θJC) - - - - See MIL-M-38510, appendix C Junction temperature (TJ) - - - - - - - - - - - - +175°C Input clamp current - - - - - - - - - - - - - - - −30mA Power dissipation (PD) - - - - - - - - - - - - - - 591 mA 2/

Supply voltage range (VCC) - - - - - - - - - - - - +4.5 V dc to +5.5 V dc Minimum high-level input voltage (VIH) - - - - - - 2.0 V dc Maximum low-level input voltage (VIL) - - - - - - 0.8 V dc Maximum high-level output current (IOH) - - - - - −12 mA Maximum low-level output current (IOL) - - - - - - −48 mA Case operating temperature range (TC) - - - - - - −55°C to +125°C Pulse duration (tw), CBA or CAB high - - - - - - - 7.0 ns CBA or CAB low - - - - - - - - - - - - - - - - - 7.0 ns Setup time(ts), A or B before CAB or CBA going high TC = 25°C, VCC = 5.0 V - - - - - - - - - - - - - 5.0 ns TC = −55°C to 125°C, VCC = 4.5 V to 5.5 V - - - 6.0 ns Hold time (th), A or B after CAB or CBA going high 1.0 ns

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - XX percent 3/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

February 23, 2017
MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, OCTAL BUS TRANSCEIVER AND REGISTER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are...
June 4, 2012
MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, OCTAL BUS TRANSCEIVER AND REGISTER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
June 16, 2006
MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, OCTAL BUS TRANSCEIVER AND REGISTER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
SMD-5962-91553
January 30, 1991
MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, OCTAL BUS TRANSCEIVER AND REGISTER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and...

References

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