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DLA - SMD-5962-88724 REV A

MICROCIRCUIT, DIGITAL, MEMORY, CMOS UV ERASABLE, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 26 February 1990
Status: inactive
Page Count: 15
scope:

This drawing describes device requirements for class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices".

The complete part number shall be as shown in the following example:

The device types shall identify the circuit function as follows:

Device type Generic number Circuit function tPD 01 C22V10L 22-input 10-output 25 ns AND-OR-logic array 02 C22V10L 22-input 10-output 30 ns AND-OR-logic array 03 C22V10L 22-input 10-output 40 ns AND-OR-logic array 04 C22V10L 22-input 10-output 20 ns AND-OR-logic array

The case outlines shall be as designated in appendix C of MIL-M-38510, and as follows:

Outline letter Case outline K F-6 (24-lead, .640" × .420" × .090"), flat package 1/ L D-9 (24-lead, 1.280" × .310" × .200"), dual-in-line package 1/ 3 C-4 (28-terminal .460" × .460" × .100"), square chip carrier package 1/

Supply voltage range - - - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc Input voltage range- - - - - - - - - - - - - - - - −2.0 V dc to +7.0 V dc 3/ Output voltage applied - - - - - - - - - - - - - - −0.6 V dc to +7.0 V dc 3/ Output sink current- - - - - - - - - - - - - - - - 16 mA Thermal resistance, junction-to-case (θJC) - - - - See MIL-M-38510, appendix C Maximum power dissipation (PD) 4/ - - - - - - - - 1.2 W Maximum junction temperature - - - - - - - - - - - +175°C Lead temperature (soldering, 10 seconds maximum) - +300°C

Supply voltage range (VCC) - - - - - - - - - - - - 4.5 V dc to 5.5 V dc High level input voltage (VIH) - - - - - - - - - - 2.0 V dc minimum Low level input voltage (VIL)- - - - - - - - - - - 0.8 V dc maximum Case operating temperature range (TC)- - - - - - - −55°C to +125°C

intended Use:

Microcircuits conforming to this drawing are intended for use when military specifications do not exist and qualified military devices that will perform the required function are not available for... View More

Document History

March 31, 2021
MICROCIRCUIT, MEMORY, DIGITAL, CMOS UV ERASABLE, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A.
October 26, 2015
MICROCIRCUIT, DIGITAL, MEMORY, CMOS UV ERASABLE, PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
April 2, 2007
MICROCIRCUIT, DIGITAL, MEMORY, CMOS UV ERASABLE, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
November 5, 2001
MICROCIRCUIT, DIGITAL, MEMORY, CMOS UV ERASABLE, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
March 13, 1996
MICROCIRCUIT, DIGITAL, MEMORY, CMOS UV ERASABLE, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
SMD-5962-88724 REV A
February 26, 1990
MICROCIRCUIT, DIGITAL, MEMORY, CMOS UV ERASABLE, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
This drawing describes device requirements for class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices"....
September 9, 1988
MICROCIRCUIT, DIGITAL, MEMORY, CMOS UV ERASABLE, PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON
A description is not available for this item.
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