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DLA - SMD-5962-87531 REV A

MICROCIRCUITS, MEMORY, DIGITAL, CMOS, PARALLEL 512 X 9 FIFO, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 4 October 1990
Status: inactive
Page Count: 18
scope:

This drawing describes device requirements for class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices".

The complete PIN shall be as shown in the following example:

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function Access time 01 See 6.6 512 × 9-bit parallel FIFO 30 ns 02 See 6.6 512 × 9-bit parallel FIFO 50 ns 03 See 6.6 512 × 9-bit parallel FIFO 80 ns

The case outline(s) shall be as designated in appendix C of MIL-M-38510, and as follows:

Outline letter Case outline X D-10 (28-lead, 1.490" × .610" × .232"), dual-in-line package Y C-12 (32-terminal, .560" × .458" × .120"), rectangular chip carrier Z F-11A (28-lead, .740" × .520" × .115"), flat package U F-11 (28-lead, .740" × .308" × .090"), flat package T D-15 (28-lead, 1.485" × .310" × .230") dual-in-line package

Supply voltage range (VCC) - - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc DC output current (IOUT) - - - - - - - - - - - - - - - 50 mA Ambient storage temperature - - - - - - - - - - - - - −65°C to +150°C Temperature under bias - - - - - - - - - - - - - - - - −55°C to +125°C Thermal resistance, junction-to-case (θJC): Case outlines X, Y, Z, U and T - - - - - - - - - - - - See MIL-M-38510, appendix C Power dissipation (PD) - - - - - - - - - - - - - - - - 1.0 W

Supply voltage range (VCC) - - - - - - - - - - - - - - +4.5 V dc to +5.5 V dc Ground voltage (VSS) - - - - - - - - - - - - - - - - - 0 V dc Minimum input high voltage (VIH) - - - - - - - - - - - 2.2 V dc Maximum input low voltage (VIL) - - - - - - - - - - - 0.8 V dc Operating case temperature range (TC)- - - - - - - - - −55°C to +125°C Rise time- - - - - - - - - - - - - - - - - - - - - - - 5 ns Fall time- - - - - - - - - - - - - - - - - - - - - - - 5 ns

intended Use:

Microcircuits conforming to this drawing are intended for use when military specifications do not exist and qualified military devices that will perform the required function are not available for... View More

Document History

May 5, 2015
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, PARALLEL 512 X 9 FIFO, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.
August 18, 2006
MICROCIRCUITS, MEMORY, DIGITAL, CMOS, PARALLEL 512 X 9 FIFO, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for government microcircuit applications (original equipment), design applications, and logistics purposes.  
January 17, 2001
MICROCIRCUITS, MEMORY, DIGITAL, CMOS, PARALLEL 512 X 9 FIFO, MONOLITHIC SILICON
Microcircuits conforming to this drawing are intended for use for government microcircuit applications (original equipment), design applications, and logistics purposes.
December 15, 1994
MICROCIRCUITS, MEMORY, DIGITAL, CMOS, PARALLEL 512 X 9 FIFO, MONOLITHIC SILICON
A description is not available for this item.
SMD-5962-87531 REV A
October 4, 1990
MICROCIRCUITS, MEMORY, DIGITAL, CMOS, PARALLEL 512 X 9 FIFO, MONOLITHIC SILICON
This drawing describes device requirements for class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices"....
May 23, 1988
MICROCIRCUITS, MEMORY, DIGITAL, CMOS, PARALLEL 512 X 9 FIFO, MONOLITHIC SILICON
A description is not available for this item.
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