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NPFC - MIL-M-38510/54

MICROCIRCUITS, DIGITAL, CMOS, POSITIVE LOGIC FOUR-BIT FULL ADDER, MONOLITHIC SILICON

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Organization: NPFC
Publication Date: 30 April 1984
Status: active
Page Count: 30
scope:

This specification covers the detail requirements for monolithic silicon, CMOS logic microcircuits. Two product assurance classes and a choice of case outline/lead finish are provided for each type and are reflected in the complete part number.

The part number shall be in accordance with MIL-M-38510.

The device type shall be as follows:

Device type Circuit 01 Four-bit full adder 51 Four-bit full adder

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outline shall be designated as follows:

Letter Case outline (see MIL-M-38510, appendix C) E D-2 (16-lead, ¼" × ⅞", dual-in-line pack) F F-5 (16-lead, ¼" × ⅜", flat pack) Z F-5 (16-lead, ¼" × ⅜", flat pack, except A dimension = .1" (2.54 mm) max).

NOTES

1. As an exception to 3.5.6.2.3 of MIL-M-38510, for case outline Z only, the leads of bottom brazed ceramic packages (i.e. configuration 2 of case outline F-5) may have electroless nickel undercoating which shall be 50 to 200 microinches (1.27 to 5.08 µm) thick provided the lead finish is hot solder dip (i.e. finish letter A) and provided that, after any lead forming, an additional hot solder dip coating is applied which shall extend from the outer tip of the lead to no more than 0.015 inch (0.38 mm) from the package edge.

2. For bottom or side brazed packages, case outline Z only, the S1 dimension may go to .000 inch (.00 mm) minimum.

Supply voltage range (VDD − VSS): Device type 01 - - - - - - - - - - - −0.5 V to +15.5 V Device type 51 - - - - - - - - - - - −0.5 V to +18.0 V Input current (each input) - - - - - - ±10 mA Input voltage range- - - - - - - - - - (VSS−0.5 V) ≤ VI ≤ (VDD + 0.5 V)

Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: George C. Marshall Space Flight Center, National Aeronautics and Space Administration, ATTN: EG02, Marshall Space Flight Center, AL 35812, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.

Storage temperature range- - - - - - - −65°C to +175°C Maximum power dissipation, PD- - - - 200 mW Lead temperature (soldering, 10 seconds)- - - - - - - - - - - - - - 300°C Thermal resistance, junction to case - - (See MIL-M-38510, appendix C) Junction temperature - - - - - - - - - - TJ = 175°C

Supply voltage range (VDD − VSS): Device type 01- - - - - - - - - - - - 4.5 V dc to 12.5 V dc Device type 51- - - - - - - - - - - - 4.5 V dc to 15.0 V dc Input low (VIL) voltage range: Device type 01- - - - - - - - - - - - 0 to 0.85 V dc at VDD = 5 V; 0 to 2.1 V dc at VDD = 12.5 V Device type 51- - - - - - - - - - - - 0 to 1.5 V dc at VDD = 5.0 V, VOL = 10 percent VDD, VOH = 90 percent VDD; 0 to 4.0 V dc at VDD = 15 V; 0 to 2.0 V dc at VDD = 10 V Input high (VIH) voltage range: Device type 01- - - - - - - - - - - 3.95 to 5.0 V dc at VDD = 5 V; 10.0 to 12.5 V dc at VDD = 12.5 V Device type 51- - - - - - - - - - - 3.5 to 5.0 V dc at VDD = 5.0 V, VOL = 10 percent VDD, VOH = 90 percent VDD; 11.0 to 15.0 V dc at VDD = 15 V; 8.0 to 10.0 V dc at VDD = 10 V Load capacitance- - - - - - - - - - - - 50 pF maximum Ambient operating temperature range - - −55°C to +125°C

intended Use:

Microcircuits conforming to this specification are intended for original equipment design applications and logistic support of existing equipment.

Document History

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MIL-M-38510/54
April 30, 1984
MICROCIRCUITS, DIGITAL, CMOS, POSITIVE LOGIC FOUR-BIT FULL ADDER, MONOLITHIC SILICON
This specification covers the detail requirements for monolithic silicon, CMOS logic microcircuits. Two product assurance classes and a choice of case outline/lead finish are provided for each type...
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