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JEDEC - JESD64

Standard for Description of 2.5 V CMOS Logic Devices with 3.6 V CMOS Tolerant Inputs and Outputs

inactive
Organization: JEDEC
Publication Date: 1 February 1998
Status: inactive
Page Count: 8

Document History

October 1, 2000
Standard for Description of 2.5 V CMOS Logic Devices with 3.6 V CMOS Tolerant Inputs and Outputs
The purpose is to provide a standard for 2.5 V nominal supply voltage logic devices for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use....
JESD64
February 1, 1998
Standard for Description of 2.5 V CMOS Logic Devices with 3.6 V CMOS Tolerant Inputs and Outputs
A description is not available for this item.
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