scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function 01 54ABT18502 Scan test device with 18-bit universal bus transceiver, three-state outputs, TTL compatible inputs

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535

The case outline(s) shall be as designated in MIL-STD-1835, and as follows:

Outline letter Descriptive designator Terminals Package style X See figure 1 68 Quad flat pack

The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range (V_CC) - - - - - - - - - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc DC input voltage range (I/O ports) (V_IN) - - - - - - - - - - - - - - −0.5 V dc to +5.5 V dc 4/ DC input voltage range (except I/O ports) (V_IN) - - - - - - - - - - - −0.5 V dc to +7.0 V dc 4/ DC output voltage range (V_OUT) - - - - - - - - - - - - - - - - - - - −0.5 V dc to +5.5 V dc 4/ DC output current (I_OL) (per output) - - - - - - - - - - - - - - - - +96 mA DC input clamp current (I_IK) (V_IN < 0.0 V) - - - - - - - - - - - - - −18 mA DC output clamp current (I_OK) (V_OUT < 0.0 V) - - - - - - - - - - - - −50 mA V_CC current (I_VCC)- - - - - - - - - - - - - - - - - - - - - - - - - - +582 mA Ground current (I_GND) - - - - - - - - - - - - - - - - - - - - - - - - +1190 mA Storage temperature range (T_STG) - - - - - - - - - - - - - - - - - - −65°C to +150°C Lead temperature (soldering, 10 seconds) - - - - - - - - - - - - - - +300°C Thermal resistance, junction-to-case (θ_JC) - - - - - - - - - - - - - 1.9°C/W Junction temperature (T_J) - - - - - - - - - - - - - - - - - - - - - - +175°C Maximum power dissipation (P_D) - - - - - - - - - - - - - - - - - - - 684 mW 5/

Supply voltage range (V_CC) - - - - - - - - - - - - - - - - - - - - - - +4.5 V dc to +5.5 V dc Input voltage range (V_IN) - - - - - - - - - - - - - - - - - - - - - +0.0 V dc to V_CC Output voltage range (V_OUT) - - - - - - - - - - - - - - - - - - - - - +0.0 V dc to V_CC Maximum low level input voltage (V_IL) - - - - - - - - - - - - - - - - 0.8 V Minimum high level input voltage (V_IH) - - - - - - - - - - - - - - - 2.0 V Maximum high level output current (I_OH) - - - - - - - - - - - - - - - −24 mA Maximum low level output current (I_OL) - - - - - - - - - - - - - - - +48 mA Maximum input rise or fall rate (Δt/ΔV) - - - - - - - - - - - - - - - 10 ns/V Minimum setup time (t_s): mAn before mCLKAB↑ or mBn before mCLKBA↑ - - - - - - - - - - - - - - 4.0 ns mAn before mLEAB↓ or mBn before mLEBA↓, CLK high - - - - - - - - - - 3.5 ns mAn before mLEAB↓ or mBn before mLEBA↓, CLK low - - - - - - - - - - - 2.0 ns mAn, mBn, mCLKAB, mCLKBA, mLEAB, mLEBA, m[O bar][E bar][A bar][B bar], or m[O bar][E bar][B bar][A bar] before TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - - - - 4.5 ns TDI before TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - - - 7.5 ns TMS before TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - - - 3.0 ns Minimum hold time (t_h): mAn after mCLKAB↑ or mBn after mCLKBA↑ - - - - - - - - - - - - - - - 0.0 ns mAn after mLEAB↓ or mBn after mLEBA↓ - - - - - - - - - - - - - - - - 2.0 ns mAn, mBn, mCLKAB, mCLKBA, mLEAB, mLEBA, m[O bar][E bar][A bar][B bar], or m[O bar][E bar][B bar][A bar] after TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - - - - 0.5 ns TDI after TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - - - 0.5 ns TMS after TCK↑ - - - - - - - - - - - - - - - - - - - - - - - - - - 0.5 ns Minimum pulse width (t_w): mCLKAB or mCLKBA, high or low - - - - - - - - - - - - - - - - - - - 3.5 ns mLEAB or mLEBA, high - - - - - - - - - - - - - - - - - - - - - - - 3.5 ns TCK, high or low - - - - - - - - - - - - - - - - - - - - - - - - - 8.0 ns Minimum delay time, power-up to TCK↑ (t_d) - - - - - - - - - - - - - - 50.0 ns 6/ Minimum rise time, V_CC power-up (t_r) - - - - - - - - - - - - - - - - 1.0 µs 6/ Maximum clock frequency (f_CLK): mCLKAB or mCLKBA - - - - - - - - - - - - - - - - - - - - - - - - - 100 MHz TCK - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 50 MHz Case operating temperature range (T_C) - - - - - - - - - - - - - - - - −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - - - - - - - - - - - XX percent 1/

intended Use: