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NPFC - MIL-M-38510/402

MICROCIRCUITS, DIGITAL, MOS, 1024-BIT, STATIC RANDOM ACCESS MEMORY (RAM), MONOLITHIC SILICON

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Organization: NPFC
Publication Date: 9 August 1983
Status: inactive
Page Count: 21
scope:

This specification covers the detail requirements for monolithic silicon, N-channel static MOS, 1024-bit RAM microcircuits. One product assurance class and a choice of case outlines and lead finishes are provided and are reflected in the complete part number.

The part complete number shall be as specified in MIL-M-38510, with the exception that the "JAN" or "J" certification mark shall not be used.

The device type shall be as shown in the following:

Device type Circuit organization package Address access time 01 (TC = −55°C 128 words/8-bit TAVQV = 450 ns instant-on to +125°C) 1/

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outline shall be designated as follows:

Letter Case outline see MIL-M-38510, appendix C J D-3 (24-lead, ½" × 1-¼") dual-in-line package

Input voltage range, all inputs - - - - - - - −0.3 V to +7.0 V Storage temperature range - - - - - - - - - - −65°C to +150°C Case operating temperature range (TC) - - - - −55°C to +125°C Supply voltage range- - - - - - - - - - - - - −0.3 V to +7.0 V 2/ Power dissipation (PD)- - - - - - - - - - - - 1.0 W maximum Lead temperature (soldering, 5 seconds) - - - 270°C Thermal resistance, junction-to-case (θJC)- - 82.5°C/W Maximum junction temperature (TJ) - - - - - - 150°C

Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RBE-2), Griffiss AFB, NY 13441, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.

Min Max Unit Supply voltage range- - - - - - - - - - - - 4.5 5.5 V Low level input voltage range (VIL) - - - - −0.3 0.8 V High level input voltage range (VIH)- - - - 2.0 VCC V Read or write cycle time (TAVAV)- - - - - - 450 --- ns Address setup time (TAVSX)- - - - - - - - - 20 --- ns Address hold time (TSXAX) - - - - - - - - - 0 --- ns Read to chip select time (TWHSX)- - - - - - 0 --- ns Read hold time from chip select (TSXWX) - - 0 --- ns Chip select pulse width (TSVSX) - - - - - - 300 --- ns Write to chip select time (TWLSX) - - - - - 0 --- ns Data setup time (TDVSX) - - - - - - - - - - 190 --- ns Data hold time from chip select (TSXDX) - - 10 --- ns Write hold time from chip select (TSXWH)- - 0 --- ns

intended Use:

Microcircuits conforming to this specification are intended for logistic support of existing equipment.

Document History

January 4, 1996
MICROCIRCUITS, DIGITAL, MOS, 1024-BIT, STATIC RANDOM ACCESS MEMORY (RAM), MONOLITHIC SILICON
A description is not available for this item.
MICROCIRCUITS, DIGITAL, MOS, 1024-BIT, STATIC RANDOM ACCESS MEMORY (RAM), MONOLITHIC SILICON
A description is not available for this item.
MIL-M-38510/402
August 9, 1983
MICROCIRCUITS, DIGITAL, MOS, 1024-BIT, STATIC RANDOM ACCESS MEMORY (RAM), MONOLITHIC SILICON
This specification covers the detail requirements for monolithic silicon, N-channel static MOS, 1024-bit RAM microcircuits. One product assurance class and a choice of case outlines and lead finishes...
June 14, 1982
MICROCIRCUITS, DIGITAL, MOS, 1024-BIT, STATIC RANDOM ACCESS MEMORY (RAM), MONOLITHIC SILICON
A description is not available for this item.
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