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DLA - SMD-5962-90747 REV A

MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, TTL COMPATIBLE, OCTAL D-TYPE EDGE TRIGGERED FLIP-FLOP, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 8 September 1992
Status: inactive
Page Count: 18
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein. Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and space application (device classes S and V), and a choice of case outlines and lead finishes are available and are reflected in the complete Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of radiation hardness assurance (RNA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device classes M, B, and S RHA marked devices s a meet the MIL-M-38510 specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V devices shall meet or exceed the electrical performance characteristics specified in table I herein after exposure to the specified irradiation levels specified in the absolute maximum ratings herein and the RHA marked device shall be marked in accordance with MIL-I-38535. A dash (-) indicates a non RHA device.

The device type shall identify the circuit function as follows:

Device type Generic number Circuit function 01 54BCT534 Octal D-type edge-triggered flip-flops, with inverted three-state outputs, TTL compatible

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 B or S Certification and qualification to MIL-M-38510 Q or V Certification and qualification to MIL-I-38535

For device classes M, B, and S, case outlines shall meet the requirements in appendix C of - 38510 and as listed below. For device classes Q and V, case outlines shall meet the requirements of MIL-I-38535, appendix C of MIL-M-38510, and as listed below.

Outline letter Case outline R D-8 (20-lead, 1.060" × .310" × .200"), dual-in-line package S F-9 (20-lead, .540" × .300" × .100"), flat package 2 C-2 (20-terminal, .358" × .358" × .100"), square chip carrier package

The lead finish shall be specified in MIL-M-38510 for classes M, B, and S, or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finish A, B. and C are considered acceptable and interchangeable without preference.

Supply voltage range (VCC) - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc Input voltage range - - - - - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc Voltage applied to any output in the disabled state - −0.5 V dc to +5.5 V dc Voltage applied to any output in the high state - - - −0.5 V dc to VCC Input clamp current - - - - - - - - - - - - - - - - - −30 mA Current into any output in the low state - - - - - 96 mA Storage temperature range - - - - - - - - - - - - - - −65°C to +150°C Lead temperature (soldering, 10 seconds)- - - - - - - +300°C Thermal resistance junction-to-case (θJC) - - - - - - See MIL-M-38510, appendix C Junction temperature (TJ) - - - - - - - - - - - - - - +175°C Power dissipation (PD) - - - - - - - - - - - - - - - 514 mW 3/

Supply voltage range (VCC) - - - - - - - - - - - - - - +4.5 V dc minimum to +5.5 V dc maximum minimum high level input voltage (VIH) - - - - - - - - 2.0 V dc Maximum low level input voltage (VIL) - - - - - - - - 0.8 V dc Maximum high level output current (IOH) - - - - - - - −12 mA Maximum low level output current (IOL) - - - - - - - - +48 mA Minimum setup time, data before CLK rising (ts): data high - - - - - - - - - - - - - - - - - - - - - 6.0 ns data low - - - - - - - - - - - - - - - - - - - - - - 9.5 ns Minimum hold time, data after CLK rising (th): data high - - - - - - - - - - - - - - - - - - - - - 0.0 ns data low - - - - - - - - - - - - - - - - - - - - 1.0 ns Minimum pulse duration, (tw): CLK high - - - - - - - - - - - - - - - - - - - - - - 6.0 ns CLK low - - - - - - - - - - - - - - - - - - - - - - 7.0 ns Case operating temperature range (TC) - - - - - - - - −55°C to +125°C

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) - - - XX percent 2/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

August 18, 1995
MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, TTL COMPATIBLE, OCTAL D-TYPE EDGE TRIGGERED FLIP-FLOP, MONOLITHIC SILICON
A description is not available for this item.
SMD-5962-90747 REV A
September 8, 1992
MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, TTL COMPATIBLE, OCTAL D-TYPE EDGE TRIGGERED FLIP-FLOP, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein. Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and...
December 21, 1990
MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, TTL COMPATIBLE, OCTAL D-TYPE EDGE TRIGGERED FLIP-FLOP, MONOLITHIC SILICON
A description is not available for this item.

References

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