UNLIMITED FREE
ACCESS
TO THE WORLD'S BEST IDEAS

SUBMIT
Already a GlobalSpec user? Log in.

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

Customize Your GlobalSpec Experience

Finish!
Privacy Policy

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

NPFC - MIL-M-38510/507

MICROCIRCUITS, MEMORY, DIGITAL, CMOS ULTRAVIOLET ERASABLE PROGRAMMABLE ARRAY LOGIC, MONOLITHIC SILICON

inactive
Buy Now
Organization: NPFC
Publication Date: 26 March 1992
Status: inactive
Page Count: 29
scope:

This specification covers the detail requirements for monolithic silicon, CMOS, erasable programmable array logic microcircuits which employ an EPROM cell as the programming element. Two product assurance classes (B and S) and a choice of case outlines and lead finishes are provided and are reflected in the complete Part or Identifying Number (PIN).

The PIN shall be in accordance with MIL-M-38510 (see 3.6 herein).

The device types shall be as follows:

Device type Circuit tPD 01 22-input, 10-output, AND-OR logic array 30 ns 02 22-input, 10-output, AND-OR logic array 25 ns 03 22-input, 10-output, AND-OR logic array 20 ns 04 22-input, 10-output, AND-OR logic array 15 ns

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outlines shall be designated as follows:

Outline letter Case outline (see MIL-M-38510, appendix C) K F-6 (24-lead, .640" × .420" × .090"), flat package; transparent lid to permit UV light erasure L D-9 (24-lead, 1.280" × .310" × .200"), dual-in-line package; transparent lid to permit UV light erasure 3 C-4 (28-terminal, .460" × .460" ×.100"), square chip carrier package; transparent lid to permit UV light erasure

Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center, (RBE-2), Griffiss AFB, NY 13441, by using the Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.

Supply voltage range - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc Input voltage range - - - - - - - - - - - - - - −3.0 V dc to +7.0 V dc Storage temperature range - - - - - - - - - - - −65°C to +150°C Lead temperature (soldering, 10 seconds) - - - +260°C Thermal resistance, junction-to-case (ΘJC) 1/- See appendix C, MIL-M-38510 Output voltage applied in high Z state - - - - −0.5 V dc to +7.0 V dc Output sink current - - - - - - - - - - - - - - 16 mA Maximum power dissipation (PD) - - - - - - - - 1.2 W Maximum junction temperature (TJ) - - - - - - - +175°C

Supply voltage range - - - - - - - - - - - - - 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH)- - - - - 2.0 V dc Maximum low level input voltage (VIL) - - - - - 0.8 V dc Case operating temperature range (TC) - - - - - −55°C to +125°C

intended Use:

Microcircuits conforming to this specification are intended for use for original equipment design application and logistic support of existing equipment.

Document History

October 5, 2020
Microcircuits, Memory, Digital, CMOS Ultraviolet Erasable Programmable Array Logic, Monolithic Silicon
A description is not available for this item.
December 22, 2010
Microcircuits, Memory, Digital, CMOS Ultraviolet Erasable Programmable Array Logic, Monolithic Silicon
A description is not available for this item.
February 27, 2006
MICROCIRCUITS, MEMORY, DIGITAL, CMOS ULTRAVIOLET ERASABLE PROGRAMMABLE ARRAY LOGIC, MONOLITHIC SILICON
This specification covers the detail requirements for monolithic silicon, CMOS, erasable programmable array logic microcircuits which employ an EPROM cell as the programming element. Two product...
May 22, 2001
MICROCIRCUITS, MEMORY, DIGITAL, CMOS ULTRAVIOLET ERASABLE PROGRAMMABLE ARRAY LOGIC, MONOLITHIC SILICON
A description is not available for this item.
July 28, 1995
MICROCIRCUITS, MEMORY, DIGITAL, CMOS ULTRAVIOLET ERASABLE PROGRAMMABLE ARRAY LOGIC, MONOLITHIC SILICON
A description is not available for this item.
MIL-M-38510/507
March 26, 1992
MICROCIRCUITS, MEMORY, DIGITAL, CMOS ULTRAVIOLET ERASABLE PROGRAMMABLE ARRAY LOGIC, MONOLITHIC SILICON
This specification covers the detail requirements for monolithic silicon, CMOS, erasable programmable array logic microcircuits which employ an EPROM cell as the programming element. Two product...
May 12, 1989
MICROCIRCUITS, MEMORY, DIGITAL, CMOS ULTRAVIOLET ERASABLE PROGRAMMABLE ARRAY LOGIC, MONOLITHIC SILICON
A description is not available for this item.

References

Advertisement