scope:

This specification covers the requirements for monolithic silicon Advanced Low Power Schottky TTL, shift register microcircuits. Two product assurance classes and a choice of case outline/lead finish are provided for each type and are reflected in the complete part number.

The part number shall be in accordance with MIL-M-38510.

The device type shall be as follows:

Device type Circuit 01 8-bit bi-directional universal shift/storage register with 3-state outputs 02 8-bit bi-directional universal shift/storage register with 3-state outputs

The device class shall be the product assurance level as defined in MIL-M-38510.

The case outline shall be designated as follows:

Letter Case outline (see MIL-M-38510, appendix C) R D-8 (20-lead, ¼" × 1 1/16"), dual-in-line package S F-9 (20-lead, ¼" × ½"), flat package 2 C-2 (20-terminal, .350" × .350"), square chip carrier.

Supply voltage range - - - - - - - - - - −0.5 V dc to +7.0 V dc Input voltage range - - - - - - - - - - −1.5 V dc at −18 mA to +7.0 V dc Storage temperature - - - - - - - - - - - −65°C to +150°C Maximum power dissipation (P_D) per device 1/: Device types 01 and 02 - - - - - - - - - - 220 mW Lead temperature (soldering, 10 seconds) - - +300°C Thermal resistance, junction-to-case (R_ΘJC): Cases R and S - - - - - - - - - - - - - - 40°C/mW Case 2 - - - - - - - - - - - - - - - - - - 60 C/mW Junction temperature (T_J) - - - - - - - - - - +175°C

Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Rome Air Development Center (RBE-2), Griffiss AFB, NY 13441, by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter.

Supply voltage- - - - - - - - - - - - - - - 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (V_IH)- - - 2.0 V dc Maximum low level input voltage (V_IL) - - - 0.8 V dc Case operating temperature range- - - - - - −55°C to +125°C Minimum clock pulse width: Device types 01 and 02: Cases - - - - - - - - - - - - - - - - - 20 ns at +125°C/−55°C Device types 01, 02: Cases - - - - - - - - - - - - - - - - - 16.5 ns at 25°C Minimum clear pulse width: Device type 01- - - - - - - - - - - - - - 10 ns Minimum clear inactive state pulse width: Device type 01- - - - - - - - - - - - - - 15 ns Minimum clear pulse data setup time: Device type 02: Low (active)- - - - - - - - - - - - - - 25 ns High (in-active)- - - - - - - - - - - - 18 ns Minimum setup time at select (SO, S1): Device types 01, 02 - - - - - - - - - - - 25 ns Minimum setup time: High level data (SL, SR, A - H) Device types 01, 02 - - - - - - - - - - 18 ns Low level data (SL, SR, A - H): Device types 01, 02 - - - - - - - - - - 7 ns Minimum hold time (S0, S1, SL, SR, A - H): Device types 01, 02 - - - - - - - - - - 0 ns

intended Use: