DLA - DSCC-VID-V62/06605
MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP, MONOLITHIC SILICON
inactive
| Organization: | DLA |
| Publication Date: | 15 February 2006 |
| Status: | inactive |
| Page Count: | 14 |
scope:
This drawing documents the general requirements of a high performance dual positive-edge-trigge
Document History
May 17, 2021
MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP, MONOLITHIC SILICON
Scope.
This drawing documents the general requirements of a high performance dual positive-edge-triggered D-type flip-flop microcircuit, with an operating temperature range of -55°C to +125°C.
December 11, 2013
MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, DUAL POSITIVE-EDGE-TRIGGERED DTYPE FLIP-FLOP, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance dual positive-edge-triggered D-type flip-flop microcircuit, with an operating temperature range of -55°C to +125°C.
DSCC-VID-V62/06605
February 15, 2006
MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance dual positive-edge-triggered D-type flip-flop microcircuit, with an operating temperature range of -55°C to +125°C.