IEC 62142
Verilog register transfer level synthesis
inactive
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| Organization: | IEC |
| Publication Date: | 1 June 2005 |
| Status: | inactive |
| Page Count: | 116 |
| ICS Code (Industrial automation systems): | 25.040 |
Document History
IEC 62142
June 1, 2005
Verilog register transfer level synthesis
A description is not available for this item.