DLA - DSCC-VID-V62/14607
MICROCIRCUIT, DIGITAL, 128-MBIT 3 V, MULTIPLE I/O, 4-KB SUBSECTOR-ERASE ON BOOT SECTORS, XiP ENABLED, SERIAL-FLASH MEMORY WITH 108 MHz, Spicebush INTERFACE, MONOLITHIC SILICON
active, Most Current
| Organization: | DLA |
| Publication Date: | 14 November 2014 |
| Status: | active |
| Page Count: | 16 |
scope:
This drawing documents the general requirements of a high performance 128-Mbit 3 V, 4 kB subsector-erase on boot sectors, XiP enabled, serial-flash memory with 108 MHz, SPI-bus interface microcircuit, with an operating temperature range of -40°C to +125°C.
Document History
DSCC-VID-V62/14607
November 14, 2014
MICROCIRCUIT, DIGITAL, 128-MBIT 3 V, MULTIPLE I/O, 4-KB SUBSECTOR-ERASE ON BOOT SECTORS, XiP ENABLED, SERIAL-FLASH MEMORY WITH 108 MHz, Spicebush INTERFACE, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance 128-Mbit 3 V, 4 kB subsector-erase on boot sectors, XiP enabled, serial-flash memory with 108 MHz, SPI-bus interface...