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IEEE HIGH-SPEED LOGIC - HIGH-PERFORANCE SYSTEM DESIGN - CIRCUITS AND LOGIC
IEEE
A description is not available for this item.
TIA-613 - High Speed Serial Interface for Data Terminal Equipment and Data Circuit- Terminating Equipment
November 1, 1993 - TIA

Section Abstracts This standard is applicable to the interconnection of data terminal equipment (DTE) and data circuit-terminating equipment (DCE) employing serial binary data interchange with control information exchanged on separate control circuits. It defines: Section 2 Normative...

VITA 17.3 - Serial Front Panel Data Port (sFPDP) Gen 3.0
January 1, 2018 - VITA

This standard defines VITA 17.3 "Serial FPDP Gen 3.0" (sFPDP), a high-speed serial communications interface. Included in this definition are various user data framing methods, supported system configurations, and the Link Layer Protocol.

MPIF HIGH TEMPERATURE - High Temperature Sintering
January 1, 1990 - MPIF
A description is not available for this item.
IEEE HIGH-PERFORM.SYSTEMS - HIGH-PERFORMANCE SYSTEM DESIGN: CIRCUITS AND LOGIC
IEEE
A description is not available for this item.
IEEE HIGH-PERFORMANCE SYS - HIGH-PERFORMANCE SYSTEM DESIGN: CIRCUITS AND LOGIC
IEEE
A description is not available for this item.
IEEE HIGH-TEMPERATURE - HIGH-TEMPERATURE ELECTRONICS
IEEE
A description is not available for this item.
HIGHWAY CAPACITY MANUAL - HIGHWAY CAPACITY MANUAL
TRB
A description is not available for this item.
JEDEC JESD 8-31 - 1.8 V HIGH-SPEED LVCMOS (HS_LVCMOS) INTERFACE
March 1, 2018 - JEDEC

This standard defines the dc and ac input levels, output levels, and input overshoot and undershoot specifications for the 1.8 V High-speed LVCMOS (HS_LVCMOS) interface. The non-terminated interface has a switching range that is nominally expected to be 0 V to 1.8 V.

JEDEC JESD 235 - High Bandwidth Memory DRAM (HBM1, HBM2)
November 1, 2018 - JEDEC

The HBM DRAM is tightly coupled to the host compute die with a distributed interface. The interface is divided into independent channels. Each channel is completely independent of one another. Channels are not necessarily synchronous to each other. The HBM DRAM uses a...

ITU-R BT.1366 - Time code format definitions and transport in the ancillary data space of a digital television interface according to Recommendations ITU-R BT.656, ITU-R BT.799, ITU-R BT.1120 and ITU-R BT.2077
July 1, 2018 - ITU-R

Part 1 of this Recommendation defines a time and control code for use in television, film and accompanying audio systems operating at 60, 59.94, 50, 30, 29.97, 25, 24 and 23.98 frames/s (fps). Section 5 describes the structure of the time address and control bits of the code and sets guidelines for...

TIA-920.130 - Telecommunications Communications Products Transmission Requirements for Digital Interface Communications Devices with Headsets
April 17, 2018 - TIA

This standard establishes transmission performance requirements for headset devices that function as narrowband (300 to 3400 Hz) or wideband (100 to 7000 Hz)1 digital interface communications devices, or both. Transmission may be over any digital interface including Local or Wide Area...

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