DLA - DSCC-VID-V62/03626 REV A
MICROCIRCUIT, DIGITAL-LINEAR, 3.3 V DUAL UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH 64 BYTE FIFO, MONOLITHIC SILICON
active, Most Current
| Organization: | DLA |
| Publication Date: | 26 September 2022 |
| Status: | active |
| Page Count: | 20 |
scope:
Scope.
This drawing documents the general requirements of a high performance 3.3 V dual universal asynchronous receiver / transmitter with 64-byte FIFO microcircuit, with an operating temperature range of -40°C to +110°C.
Document History
DSCC-VID-V62/03626 REV A
September 26, 2022
MICROCIRCUIT, DIGITAL-LINEAR, 3.3 V DUAL UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH 64 BYTE FIFO, MONOLITHIC SILICON
Scope.
This drawing documents the general requirements of a high performance 3.3 V dual universal asynchronous receiver / transmitter with 64-byte FIFO microcircuit, with an operating temperature...
March 20, 2003
MICROCIRCUIT, DIGITAL-LINEAR, 3.3 V DUAL UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH 64 BYTE FIFO, MONOLITHIC SILICON
A description is not available for this item.