UNLIMITED FREE
ACCESS
TO THE WORLD'S BEST IDEAS

SUBMIT
Already a GlobalSpec user? Log in.

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

Customize Your GlobalSpec Experience

Finish!
Privacy Policy

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

JEDEC JESD 82-23

Definition of the SSTUA32S869 and SSTUA32D869 DDR2 RDIMM Applications Registered Buffer with Parity for

active, Most Current
Buy Now
Organization: JEDEC
Publication Date: 1 May 2007
Status: active
Page Count: 32
scope:

This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTUA32S869 and SSTUA32D869 registered buffer with parity for driving heavy load on high-density DDR2 RDIMM applications. A typical application would be a 36 SDRAM planar DIMM. The SSTUA32S869 and SSTUA32D869 are identical in functionality to the SSTU32S869 and SSTU32D869 devices respectively but specify tighter timing characteristics and a higher application frequency of up to 410MHz.

Document History

January 1, 2023
Definition of the SSTUA32S869 and SSTUA32D869 Registered Buffer with Parity for DDR2 RDIMM Applications
This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTUA32S869 and SSTUA32D869 registered buffer with parity for...
JEDEC JESD 82-23
May 1, 2007
Definition of the SSTUA32S869 and SSTUA32D869 DDR2 RDIMM Applications Registered Buffer with Parity for
This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTUA32S869 and SSTUA32D869 registered buffer with parity for...
Advertisement