scope:

This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTUA32S869 and SSTUA32D869 registered buffer with parity for driving heavy load on high-density DDR2 RDIMM applications. A typical application would be a 36 SDRAM planar DIMM. The SSTUA32S869 and SSTUA32D869 are identical in functionality to the SSTU32S869 and SSTU32D869 devices respectively but specify tighter timing characteristics and a higher application frequency of up to 410 MHz.

The purpose is to provide a standard for the SSTUA32S869 and SSTUA32D869 (see Note) logic devices, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.

NOTE The designations SSTUA32S869 and SSTUA32D869 refers to the part designation of a series of commercial logic parts common in the industry. This number is normally preceded by a series of manufacturer specific characters to make up a complete part designation.