scope:

This standard defines the electrical and mechanical requirements for 288-pin, 1.2 Volt (VDD), Double Data Rate, Synchronous SDRAM Non-Volatile Dual In-Line Memory Modules with NAND Flash backup (DDR4 NVDIMM-N). A DDR4 NVDIMM-N is a Hybrid Memory Module with a DDR4 DIMM interface consisting of DRAM that is made non-volatile through the use of NAND Flash. NVDIMM-N modules adhere to the Byte Addressable Energy Backed Interface specification.

The JESD245B Byte Addressable Energy Backed Interface specification provides detailed logical behavior, interface, and register definitions. These DDR4 NVDIMM-N's are intended for use as persistent memory when installed in PCs.

An NVDIMM-N is either an:

NVLRDIMM-N: a Load Reduced DIMM (LRDIMM) compliant with JESD21C Page 4.20.27 DDR4 SDRAM Load Reduced DIMM Design specification except as specified in this standard; or

NVRDIMM-N: a Registered DIMM (RDIMM) compliant with JESD21C Page 4.20.28 DDR4 SDRAM Registered DIMM Design Specification except as specified in this standard.

System interface constraints are included which provide an initial basis for DDR4 NVDIMM-N designs. Modifications to these constraints may be required to meet all system timing, signal integrity and thermal requirements for PC4-1600, PC4-1866, PC4-2133, PC4-2400, PC4-2666 and PC4-3200 support. All DDR4 NVDIMM-N implementations must use simulations and lab verification to ensure proper timing requirements and signal integrity in the design.

The annex for each raw card will have specific entries to indicate DIMM operation and voltage levels. This specification works in conjunction with:

• JESD21C, Page 4.1.2.L-5 Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules (DDR4 SPD Document Release 5)
• JESD21C, Page 4.20.27 DDR4 SDRAM Load Reduced DIMM Design Specification (August 2015)
• JESD21C, Page 4.20.28 DDR4 SDRAM Registered DIMM Design Specification (August 2015)
• JESD79-4B, DDR4 SDRAM (June 2017)
• JESD245B, Byte Addressable Energy Backed Interface (July 2017)