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JEDEC JEP 156

Chip-Package Interaction Understanding, Identification and Evaluation

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Organization: JEDEC
Publication Date: 1 March 2009
Status: inactive
Page Count: 24
scope:

This publication references a set of frequently recommended and accepted JEDEC reliability stress tests. These tests are used for qualifying new and modified technology/ process/ product families, as well as individual solid state surface-mount products. 

Document History

JEDEC JEP 156
March 1, 2018
Chip-Package Interaction Understanding, Identification, and Evaluation
This publication references a set of frequently recommended and accepted JEDEC reliability stress tests. These tests are used for qualifying new and modified technology/ process/ product families, as...
JEDEC JEP 156
March 1, 2009
Chip-Package Interaction Understanding, Identification and Evaluation
This publication references a set of frequently recommended and accepted JEDEC reliability stress tests. These tests are used for qualifying new and modified technology/ process/ product families, as...

References

This document is referenced by:
JEDEC JEP 143 - Solid-State Reliability Assessment and Qualification Methodologies
Published by JEDEC on January 1, 2019
This publication applies to all integrated circuits and their associated packages. The document summarizes the suite of reliability documents and publications available. These documents address...
This document is referenced by:
JEDEC JESD 88 - JEDEC Dictionary of Terms for Solid State Technology
Published by JEDEC on July 1, 2007
Each term and definition in this dictionary has been included strictly for application within the solid-state industry. Many of the terms and definitions in this dictionary may have applicability...
This document is referenced by:
JEDEC JEP 70 - Guide to Standards and Publications Relating to Quality and Reliability of Electronic Hardware
Published by JEDEC on October 1, 2013
This publication contains a listing and description of commonly used quality and reliability related publications applicable to the semiconductor industry. It is intended to be a reference aid in...

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