DLA - DSCC-VID-V62/09619
MICROCIRCUIT, DIGITAL, CMOS, 1:3 LVPECL CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, MONOLITHIC SILICON
inactive
| Organization: | DLA |
| Publication Date: | 6 April 2009 |
| Status: | inactive |
| Page Count: | 20 |
scope:
This drawing documents the general requirements of a high performance 1:3 LVPECL clock buffer with programmable divider microcircuit, with an operating temperature range of -55ºC to +125ºC.
Document History
June 19, 2017
MICROCIRCUIT, DIGITAL, CMOS, 1:3 LVPECL CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance 1:3 LVPECL clock buffer with programmable divider microcircuit, with an operating temperature range of -55°C to +125°C.
DSCC-VID-V62/09619
April 6, 2009
MICROCIRCUIT, DIGITAL, CMOS, 1:3 LVPECL CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance 1:3 LVPECL clock buffer with programmable divider microcircuit, with an operating temperature range of -55ºC to +125ºC.