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DLA - SMD-5962-92200

MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 10-BIT TRANSPARENT LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 28 June 1993
Status: inactive
Page Count: 26
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and space application (device classes S and V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device classes M, B, and S RHA marked devices shall meet the MIL-M-38510 specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function 01 54ACTQ41 10-bit latch with three-state outputs, TTL compatible inputs.

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 B or S Certification and qualification to MIL-M-38510 Q or V Certification and qualification to MIL-I-38535

The case outline(s) shall be as designated in MIL-STD-1835, and as follows:

Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line K GDFP2-F24 or CDFP3-F24 24 Flat pack 3 CQCC1-N28 28 Leadless-chip-carrier

The lead finish shall be as specified in MIL-M-38510 for classes M, B, and S or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range (VCC) - - - - - - - - - - - - - - - - - - - - - −0.5 V dc to +7.0 V dc DC input voltage range (VIN) - - - - - - - - - - - - - - - - - - - - −0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) - - - - - - - - - - - - - - - - - - - −0.5 V dc to VCC + 0.5 V dc DC input clamp current (IIK) (VIN = −0.5 V and VCC + 0.5 V) - - - ±20 mA DC output clamp current (IOK) (VOUT = −0.5 V and VCC + 0.5 V) - - - ±20 mA DC output current (IOUT) per output pin - - - - - - - - - - - - - - ±50 mA DC VCC or GND current (ICC, IGND) per pin - - - - - - - - - - - - - ±500 mA Storage temperature range (TSTG) - - - - - - - - - - - - - - - - - - −65°C to +150°C Maximum power dissipation (PD) - - - - - - - - - - - - - - - - - - - 500 mW Lead temperature (soldering, 10 seconds) - - - - - - - - - - - - - - +300°C Thermal resistance, junction-to-case (θJC) - - - - - - - - - - - - - See MIL-STD-1835 Junction temperature (TJ) - - - - - - - - - - - - - - - - - - - - - +175°C

Supply voltage range (VCC) - - - - - - - - - - - - - - - - - - - - - +4.5 V dc to +5.5 V dc Input voltage range (VIN) - - - - - - - - - - - - - - - - - - - - - +0.0 V dc to VCC Output voltage range (VOUT) - - - - - - - - - - - - - - - - - - - - +0.0 V dc to VCC Maximum low level input voltage (VIL) - - - - - - - - - - - - - - - 0.8 V Minimum high level input voltage (VIH) - - - - - - - - - - - - - - - 2.0 V Case operating temperature range (TC) - - - - - - - - - - - - - - - −55°C to +125°C Input edge rate (ΔV/Δt) maximum: (from VIN = 0.8 V to 2.0 V, 2.0 V to 0.8 V) - - - - - - - - - - - 125 mV/ns Maximum high level output current (IOH) - - - - - - - - - - - - - - −24 mA Maximum low level output current (IOL) - - - - - - - - - - - - - - +24 mA

Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012)- - - - - - - - - - - - XX percent 4/

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

June 17, 2020
MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 10-BIT TRANSPARENT LATCH WITH THREESTATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead...
May 16, 2013
MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 10-BIT TRANSPARENT LATCH WITH THREESTATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
October 6, 2006
MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 10-BIT TRANSPARENT LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
SMD-5962-92200
June 28, 1993
MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 10-BIT TRANSPARENT LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes B, Q, and M) and...

References

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