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DLA - SMD-5962-96634

MICROCIRCUIT, DIGITAL, RADIATION HARDENED CMOS, QUAD THREE-STATE R/S LATCH, MONOLITHIC SILICON

inactive
Organization: DLA
Publication Date: 20 December 1995
Status: inactive
Page Count: 15
scope:

This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.

The PIN shall be as shown in the following example:

Device class M RHA marked devices shall meet the MIL-I-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

The device type(s) shall identify the circuit function as follows:

Device type Generic number Circuit function 01 4043B Radiation hardened CMOS quad cross- coupled 3-state NOR latches 02 4044B Radiation hardened CMOS quad cross- coupled 3-state NAND latches 03 4043BN Radiation hardened CMOS quad cross- coupled 3-state NOR latches with neutron irradiated die

The device class designator shall be a single letter identifying the product assurance level as follows:

Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-I-38535

The case outline(s) shall be as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style E CDIP2-T16 16 Dual-in-line package X CDFP4-F16 16 Flat package

The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-I-38535 for classes Q and V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference.

Supply voltage range (VDD) . . . . . . . . . . . . . . . . . . −0.5 V dc to +6.0 V dc Input voltage range . . . . . . . . . . . . . . . . . . . . . −0.5 V dc to VDD + 0.5 V dc DC input current, any one input . . . . . . . . . . . . . . . ±10 mA Device dissipation per output transistor . . . . . . . . . . . 100 mW Storage temperature range (TSTG) . . . . . . . . . . . . . . . −65°C to +150°C Lead temperature (soldering, 10 seconds) . . . . . . . . . . . +265°C Thermal resistance, junction-to-case (ΘJC): Case outline E . . . . . . . . . . . . . . . . . . . . . . . 24°C/W Case outline X . . . . . . . . . . . . . . . . . . . . . . . 29°C/W Thermal resistance, junction-to-ambient ΘJA): Case outline E . . . . . . . . . . . . . . . . . . . . . . . 73°C/W Case outline X . . . . . . . . . . . . . . . . . . . . . . . 114°C/W Junction temperature (TJ) . . . . . . . . . . . . . . . . . . +175°C Maximum package power dissipation at TA = +125°C (PD): 4/ Case outline E . . . . . . . . . . . . . . . . . . . . . . . 0.68 W Case outline X . . . . . . . . . . . . . . . . . . . . . . . 0.44 W

Supply voltage range (VDD) . . . . . . . . . . . . . . . . . . 3.0 v dc to +18 V dc Case operating temperature range (TC). . . . . . . . . . . . . −55°C to +125°C Input voltage (VIN) . . . . . . . . . . . . . . . . . . . . . 0 V to VDD Output voltage (VOUT) . . . . . . . . . . . . . . . . . . . . 0 V to VDD Radiation features: Total dose . . . . . . . . . . . . . . . . . . . . . . . . . 1 × 105 Rads (Si) Single event phenomenon (SEP) effective linear energy threshold, no upsets (see 4.4.4.5) . . . . . > 75 MEV/(cm2/mg) 5/ Dose rate upset (20 ns pulse) . . . . . . . . . . . . . . . > 5 × 108 Rads (Si)/s 5/ Dose rate latch-up . . . . . . . . . . . . . . . . . . . . > 2 × 108 Rads (Si)/s 5/ Dose rate survivability . . . . . . . . . . . . . . . . . . > 5 × 1011 Rads (Si)/s 5/ Neutron irradiated (device type 03) . . . . . . . . . . . . > 1 × 1014 neutrons/cm2

Unless otherwise specified, the following specification, standards, bulletin, and handbook of the issue listed in that issue of the Department of Defense Index of Specifications and Standards specified in the solicitation, form a part of this drawing to the extent specified herein.

SPECIFICATION MILITARY MIL-I-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS MILITARY MIL-STD-883 - Test Methods and Procedures for Microelectronics. MIL-STD-973 - Configuration Management. MIL-STD-1835 - Microcircuit Case Outlines.

BULLETIN MILITARY MIL-BUL-103 - List of Standard Microcircuit Drawings (SMD's). HANDBOOK MILITARY MIL-HDBK-780 - Standardized Military Drawings.

(Copies of the specification, standards, bulletin, and handbook required by manufacturers in connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting activity.)

In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing shall take precedence.

intended Use:

Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes.

Microcircuits... View More

Document History

January 31, 2020
MICROCIRCUIT, DIGITAL, RADIATION HARDENED CMOS, QUAD THREE-STATE R/S LATCH, MONOLITHIC SILICON
Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q) and space application (device class V). A choice of case outlines and lead finishes...
June 23, 2010
MICROCIRCUIT, DIGITAL, RADIATION HARDENED CMOS, QUAD THREE-STATE R/S LATCH, MONOLITHIC SILICON
This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes...
July 2, 2003
MICROCIRCUIT, DIGITAL, RADIATION HARDENED CMOS, QUAD THREE-STATE R/S LATCH, MONOLITHIC SILICON
A description is not available for this item.
August 4, 1997
MICROCIRCUIT, DIGITAL, RADIATION HARDENED CMOS, QUAD THREE-STATE R/S LATCH, MONOLITHIC SILICON
A description is not available for this item.
February 28, 1997
MICROCIRCUIT, DIGITAL, RADIATION HARDENED CMOS, QUAD THREE-STATE R/S LATCH, MONOLITHIC SILICON
This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535...
SMD-5962-96634
December 20, 1995
MICROCIRCUIT, DIGITAL, RADIATION HARDENED CMOS, QUAD THREE-STATE R/S LATCH, MONOLITHIC SILICON
This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and...

References

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