UNLIMITED FREE
ACCESS TO THE WORLD'S BEST IDEAS

SUBMIT
Already a GlobalSpec user? Log in.

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

Customize Your GlobalSpec Experience

Select Your Free Newsletters

Industry Newsletters

Select Your Free Product Alerts

Finish!
Privacy Policy

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

JEDEC JESD 252

Serial Flash Reset Signaling Protocol

active, Most Current
Buy Now
Organization: JEDEC
Publication Date: 1 October 2018
Status: active
Page Count: 12
scope:

This standard specifies the signaling protocol for hardware resetting a Serial Flash device. The protocol can be used in the absence of or in addition to a dedicated RESET# pin on the device.

Document History

JESD252.01
April 1, 2021
Serial Flash Reset Signaling Protocol
This standard specifies the signaling protocol for hardware resetting a Serial Flash device. The protocol can be used in the absence of or in addition to a dedicated RESET# pin on the device.
JEDEC JESD 252
October 1, 2018
Serial Flash Reset Signaling Protocol
This standard specifies the signaling protocol for hardware resetting a Serial Flash device. The protocol can be used in the absence of or in addition to a dedicated RESET# pin on the device.

References

This document references:
JEDEC JESD 251 - EXpanded Serial Peripheral Interface (xSPI) for Non Volatile Memory Devices, Version 1.0
Published by JEDEC on February 1, 2020
This standard specifies the eXpanded Serial Peripheral Interface (xSPI) for Non Volatile Memory Devices, which provides high data throughput, low signal count, and limited backward compatibility with...
This document references:
JEDEC JESD 100 - Terms, Definitions, and Letter Symbols for Microcomputers, Microprocessors, and Memory Integrated Circuits
Published by JEDEC on December 1, 2002
A revised reference for technical writers and educators, manufacturers, buyers and users of microprocessors, microcomputers, mircocontrollers, memory ICs, and other complex devices. The terms and...
This document references:
JEDEC JESD 216 - Serial Flash Discoverable Parameters (SFDP)
Published by JEDEC on November 1, 2018
The SFDP standard defines the structure of the SFDP database within the memory device and methods used to read its data. The JEDEC-defined header with Parameter ID FF00h and the related Basic...
This document references:
JEDEC JESD 251 - EXpanded Serial Peripheral Interface (xSPI) for Non Volatile Memory Devices, Version 1.0
Published by JEDEC on February 1, 2020
This standard specifies the eXpanded Serial Peripheral Interface (xSPI) for Non Volatile Memory Devices, which provides high data throughput, low signal count, and limited backward compatibility with...
This document references:
JEDEC JESD 88 - JEDEC Dictionary of Terms for Solid State Technology
Published by JEDEC on July 1, 2007
Each term and definition in this dictionary has been included strictly for application within the solid-state industry. Many of the terms and definitions in this dictionary may have applicability...
This document references:
JEDEC JESD 99 - Terms, Definitions, and Letter Symbols for Microelectronic Devices
Published by JEDEC on December 1, 2012
Foreword This standard will prove to be a useful guide for users, manufacturers, educators, technical writers, and others interested in the characterization, nomenclature, and classification of...
View Less
View All
Advertisement