BSI - BS IEC 63011-2
Integrated circuits – Three dimensional integrated circuits Part 2: Alignment of stacked dies having fine pitch interconnect
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| Organization: | BSI |
| Publication Date: | 31 January 2019 |
| Status: | active |
| Page Count: | 18 |
| ICS Code (Integrated circuits. Microelectronics): | 31.200 |
Document History
BS IEC 63011-2
January 31, 2019
Integrated circuits – Three dimensional integrated circuits Part 2: Alignment of stacked dies having fine pitch interconnect
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