IEC 63011-1
Integrated circuits – Three dimensional integrated circuits – Part 1: Terminology
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| Organization: | IEC |
| Publication Date: | 1 November 2018 |
| Status: | active |
| Page Count: | 28 |
| ICS Code (Integrated circuits. Microelectronics): | 31.200 |
scope:
This part of IEC 63011 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.
Document History
IEC 63011-1
November 1, 2018
Integrated circuits – Three dimensional integrated circuits – Part 1: Terminology
This part of IEC 63011 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to...