DLA - DSCC-VID-V62/04669 REV D
MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, DUAL POSITIVE-EDGE-TRIGGERED DTYPE FLIP-FLOP WITH CLEAR AND PRESET, MONOLITHIC SILICON
active, Most Current
| Organization: | DLA |
| Publication Date: | 21 October 2022 |
| Status: | active |
| Page Count: | 10 |
scope:
Scope.
This drawing documents the general requirements of a high performance dual positive-edge-trigge
Document History
DSCC-VID-V62/04669 REV D
October 21, 2022
MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, DUAL POSITIVE-EDGE-TRIGGERED DTYPE FLIP-FLOP WITH CLEAR AND PRESET, MONOLITHIC SILICON
Scope.
This drawing documents the general requirements of a high performance dual positive-edge-triggered D-type flip-flop with clear and preset microcircuit, with an operating temperature range of...
February 24, 2016
MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, DUAL POSITIVE-EDGE-TRIGGERED DTYPE FLIP-FLOP WITH CLEAR AND PRESET, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance dual positive-edge-triggered D-type flip-flop with clear and preset microcircuit, with an operating temperature range of -40°C to...
October 3, 2007
MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance dual positive-edge-triggered D-type flip-flop with clear and preset microcircuit, with an operating temperature range of -40°C to...
August 7, 2007
MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, MONOLITHIC SILICON
This drawing documents the general requirements of a high performance dual positive-edge-triggered D-type flip-flop with clear and preset microcircuit, with an operating temperature range of -40°C to...
March 8, 2004
MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, MONOLITHIC SILICON
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