JEDEC - JESD22-A105D
Power and Temperature Cycling
active, Most Current
| Organization: | JEDEC |
| Publication Date: | 1 January 2020 |
| Status: | active |
| Page Count: | 11 |
scope:
This test method applies to semiconductor devices that are subjected to temperature excursions and required to power on and off during all temperatures. The power and temperature cycling test is performed to determine the ability of a device to withstand alternate exposures at high and low temperature extremes with operating biases periodically applied and removed. It is intended to simulate worst case conditions encountered in typical applications.
The power and temperature cycling test is considered destructive. It is intended for device qualification.
Document History
JESD22-A105D
January 1, 2020
Power and Temperature Cycling
This test method applies to semiconductor devices that are subjected to temperature excursions and required to power on and off during all temperatures. The power and temperature cycling test is...
January 1, 2004
Power and Temperature Cycling
This test method applies to semiconductor devices that are subjected to temperature excursions and required to power on and off during all temperatures. The power and temperature cycling test is...
January 1, 2004
Power and Temperature Cycling
The power and temperature cycling test is performed to determine the ability of a device to withstand alternate exposures at high and low temperature extremes and simultaneously the operating biases...
February 1, 1996
Test Method A105-B Power and Temperature Cycling
A description is not available for this item.
May 1, 1988
Test Method A105-A Power and Temperature Cycling
A description is not available for this item.