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BSI - 13/30284029 DC

Draft BS EN 60191-6-16 Mechanical standardization of semiconductor devices Part 6-16: Glossary of semiconductor tests and burn-in sockets for BGA, LGA, FBGA and FLGA

pending
Organization: BSI
Publication Date: 8 May 2013
Status: pending
Page Count: 13
ICS Code (Semiconductor devices in general): 31.080.01

Document History

13/30284029 DC
May 8, 2013
Draft BS EN 60191-6-16 Mechanical standardization of semiconductor devices Part 6-16: Glossary of semiconductor tests and burn-in sockets for BGA, LGA, FBGA and FLGA
A description is not available for this item.
BS EN 60191-6-16
July 31, 2007
Mechanical standardization of semiconductor devices - Part 6-16: Glossary of semiconductor tests and burn-in sockets for BGA, LGA, FBGA and FLGA
A description is not available for this item.

References

This document references:
IEC 60191-1 - Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices
Published by IEC on January 1, 2018
This part of IEC 60191 gives guidelines on the preparation of outline drawings of discrete devices, including discrete surface-mounted semiconductor devices with lead count less than 8. For the...
This document references:
IEC 60191-2 - Amendment 16 Mechanical Standardization of Semiconductor Devices - Part 2: Dimensions
Published by IEC on July 1, 2007
A description is not available for this item.
This document references:
IEC 60191-3 - Mechanical Standardization of Semiconductor Devices - Part 3: General Rules for the Preparation of Outline Drawings of Integrated Circuits
Published by IEC on October 1, 1999
A description is not available for this item.
This document references:
IEC 60191-4 - Mechanical Standardization of Semiconductor Devices - Part 4: Coding System and Classification into Forms of Package Outlines for Semiconductor Device Packages
Published by IEC on March 1, 2018
This part of IEC 60191 specifies a method for the designation of package outlines and for the classification of forms of package outlines for semiconductor devices and a systematic method for...
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