NPFC - MIL-STD-2217
MEMORY LOADER/VERIFIER MULTIPLEX BUS INTERFACE WITH AVIONIC SYSTEMS, REQUIREMENTS FOR
| Organization: | NPFC |
| Publication Date: | 22 May 2000 |
| Status: | active |
| Page Count: | 224 |
scope:
The Memory Loader/Verifier (MLV) will provide the means for loading and verifying avionics memories in military aircraft utilizing a multiplex bus interface.
New or modified memory data will first be processed by designated facilities for each avionic system. It will then be transmitted to each user and transferred to the MLV Memory Storage Device (MSD) at the Intermediate Maintenance Activity (IMA). The MSD in each MLV will then contain a completely updated record of all memory data to be loaded into the avionic memories.
The MLV, using the interfaces defined herein, will be utilized to reprogram all applicable systems aboard an aircraft at the organizational maintenance level (O-Level). It will load the new data into the memories of the appropriate avionics systems and verify that the memories have been correctly loaded where possible.
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