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NPFC - MIL-STD-2217

MEMORY LOADER/VERIFIER MULTIPLEX BUS INTERFACE WITH AVIONIC SYSTEMS, REQUIREMENTS FOR

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Organization: NPFC
Publication Date: 22 February 2005
Status: active
Page Count: 1

Document History

MIL-STD-2217 VALID NOTICE 6
December 5, 2022
Memory Loader/Verifier Multiplex Bus Interface With Avionic Systems, Requirements for
A description is not available for this item.
MIL-STD-2217
January 19, 2018
MEMORY LOADER/VERIFIER MULTIPLEX BUS INTERFACE WITH AVIONIC SYSTEMS
A description is not available for this item.
MIL-STD-2217
November 4, 2014
Memory Loader/Verifier Multiplex Bus Interface With Avionic Systems, Requirements for
A description is not available for this item.
MIL-STD-2217
February 22, 2005
MEMORY LOADER/VERIFIER MULTIPLEX BUS INTERFACE WITH AVIONIC SYSTEMS, REQUIREMENTS FOR
A description is not available for this item.
MIL-STD-2217
May 22, 2000
MEMORY LOADER/VERIFIER MULTIPLEX BUS INTERFACE WITH AVIONIC SYSTEMS, REQUIREMENTS FOR
The Memory Loader/Verifier (MLV) will provide the means for loading and verifying avionics memories in military aircraft utilizing a multiplex bus interface. New or modified memory data will first...
MIL-STD-2217
May 28, 1993
MEMORY LOADER/VERIFIER MULTIPLEX BUS INTERFACE WITH AVIONIC SYSTEMS, REQUIREMENTS FOR
The Memory Loader/Verifier (MLV) will provide the means for loading and verifying avionics memories in military aircraft utilizing a multiplex bus interface. New or modified memory data will first...
MIL-STD-2217
October 16, 1991
MEMORY LOADER/VERIFIER MULTIPLEX BUS INTERFACE WITH AVIONIC SYSTEMS, REQUIREMENTS FOR
The Memory Loader/Verifier (MLV) will provide the means for loading and verifying avionics memories in military aircraft utilizing a multiplex bus interface. New or modified memory data will first...
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References

This document references:
FED-STD-1020 - TELECOMMUNICATIONS: ELECTRICAL CHARACTERISTICS OF BALANCED VOLTAGE DIGITAL INTERFACE CIRCUITS
Published by NPFC on January 1, 1980
This standard specifies the electrical characteristics of balanced voltage digital interface circuits normally implemented in integrated circuit technology that are to be employed for the interchange...
This document references:
MIL-STD-1553 - DIGITAL TIME DIVISION COMMAND/RESPONSE MULTIPLEX DATA BUS
Published by NPFC on February 28, 2018
This standard establishes requirements for digital, command/response, time division multiplexing (data bus) techniques. It encompasses the data bus line and its interface electronics, and also...
This document references:
MIL-STD-461 - REQUIREMENTS FOR THE CONTROL OF ELECTROMAGNETIC INTERFERENCE CHARACTERISTICS OF SUBSYSTEMS AND EQUIPMENT
Published by NPFC on December 11, 2015
Purpose. This standard establishes interface and associated verification requirements for the control of the electromagnetic interference (EMI) emission and susceptibility characteristics of...
This document references:
MIL-STD-704F VALID NOTICE 3 - Aircraft Electric Power Characteristics
Published by NAVY on September 17, 2021
A description is not available for this item.
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