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JEDEC JESD 51-3

Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages

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Organization: JEDEC
Publication Date: 1 August 1996
Status: active
Page Count: 10
scope:

This standard describes design requirements for a single layer, leaded surface mount integrated circuit package thermal test board. The standard describes board material and geometry requirements, minimum trace lenghts, trace thickness, and routing considerations. Application includes still air and moving air thermal tests.

Document History

JEDEC JESD 51-3
August 1, 1996
Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
This standard describes design requirements for a single layer, leaded surface mount integrated circuit package thermal test board. The standard describes board material and geometry requirements,...

References

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